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M74HC299B1R-M74HC299M1R-M74HC299RM13TR
8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR
1/13July 2001 HIGH SPEED :
fMAX = 80MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:
ICC =4μA(MAX.) at TA=25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 6mA (MIN) FOR QA’ TO QH’
|IOH| = IOL = 4mA (MIN) FOR QA TO QH BALANCED PROPAGATION DELAYS: PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 299
DESCRIPTIONThe M74HC299 is an high speed CMOS 8 BIT
PIPO SHIFT REGISTER (3-STATE) fabricated
with silicon gate C2 MOS technology.
This device has four modes (HOLD, SHIFT LEFT,
SHIFT RIGHT and LOAD DATA). Each mode is
chosen by two function select inputs (S0, S1).
When one or both enable inputs, (G1, G2) are
high, the eight input/output terminals are in the
high impedance state; however sequential
operation or clearing of the register is not affected.
Clear function on the M74HC299 is asynchronous
to CLOCK.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC2998 BIT PIPO SHIFT REGISTER
WITH ASYNCHRONOUS CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC2992/13
IINPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE * When one or both output controls are high, the eight input/output terminals are in the high impedance state: however sequential operation
or clearing of the register is not affected.
Z : High Impedance
Qn0 : The level of An before the indicated steady state input conditions were established.
Qnn : The level of Qn before the most recent active transition indicated by OR
a, h : The level of the steady state inputs A, H, respectively.
X : Don’t Care
M74HC2993/13
LOGIC DIAGRAM
M74HC2994/13
TIMING CHART
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not t implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC2995/13
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC2996/13
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC2997/13
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
TEST CIRCUIT CL = 50pF/150pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)