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M74HC283M1R-M74HC283RM13TR
4 BIT BINARY FULL ADDER
1/9August 2001 HIGH SPEED :
tPD = 17ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC =4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V FULL-CARRY LOOK-AHEAD ACROSS THE
FOUR BITS PARTIAL LOOK-AHEAD WITH THE
ECONOMY OF RIPPLE CARRY PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 283
DESCRIPTIONThe M74HC283 is an high speed CMOS 4 BIT
BINARY FULL ADDER fabricated with silicon gate2 MOS technology.
Sum (Σ) outputs are provided for each bit and a
resultant carry (C4) is obtained from the fourth bit.
This adder features full internal look ahead across
all four bits. A 4 x n binary adder is easily built up
by cascading without any additional logic.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC2834-BIT BINARY FULL ADDER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC2832/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
BLOCK DIAGRAM
M74HC2833/9
LOGIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC2834/9
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC2835/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
