M74HC259RM13TR ,8 BIT ADDRESSABLE LATCHABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage -0.5 to +7 VCCV DC Input ..
M74HC266M1R ,QUAD EXCLUSIVE NOR GATE WITH OPEN DRAINAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
M74HC27 ,TRIPLE 3-INPUT NOR GATEAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
M74HC273M1R ,OCTAL D TYPE FLIP FLOP WITH CLEARM74HC273OCTAL D TYPE FLIP FLOP WITH CLEAR ■ HIGH SPEED : ..
M74HC273RM13TR ,OCTAL D TYPE FLIP FLOP WITH CLEARAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
M74HC279M1R ,QUAD S-R LATCHM74HC279QUAD S - R LATCH ■ HIGH SPEED:t = 13ns (TYP.) at V = 6VPD CC■ LOW POWER DISSIPATION:I =2 ..
MAX1400CAI+ ,+5V 18-Bit Low-Power Multichannel Oversampling (Sigma-Delta) ADCELECTRICAL CHARACTERISTICS(V+ = +5V ±5%, V = +2.7V to +5.25V, V = +2.50V, REFIN- = AGND, f = 2.4576 ..
MAX1400EAI+ ,+5V 18-Bit Low-Power Multichannel Oversampling (Sigma-Delta) ADCFeaturesThe MAX1400 18-bit, low-power, multichannel, serial-♦ 18-Bit Resolution, Sigma-Delta ADCout ..
MAX1402CAI ,+5V / 18-Bit / Low-Power / Multichannel / Oversampling Sigma-Delta ADCfeatures matched' 16-Bit Accuracy with No Missing Codes to 480sps200µA current sources for sensor e ..
MAX1402CAI+ ,+5V, 18-Bit, Low-Power, Multichannel, Oversampling (Sigma-Delta) ADCELECTRICAL CHARACTERISTICS(V+ = +5V ±5%, V = +2.7V to +5.25V, V = +2.50V, REFIN- = AGND, f = 2.4576 ..
MAX1402EAI ,+5V / 18-Bit / Low-Power / Multichannel / Oversampling Sigma-Delta ADCApplicationsCS 3 26 DOUTPortable Industrial InstrumentsRESET 4 25 INTPortable Weigh ScalesDS1 5 24 ..
MAX1402EAI ,+5V / 18-Bit / Low-Power / Multichannel / Oversampling Sigma-Delta ADCFeaturesThe MAX1402 low-power, multichannel, serial-output' 18-Bit Resolution, Sigma-Delta ADCanalo ..
M74HC259B1R-M74HC259M1R-M74HC259RM13TR
8 BIT ADDRESSABLE LATCH
1/13July 2001 HIGH SPEED :
tPD = 20 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC =4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 259
DESCRIPTIONThe M74HC259 is an high speed CMOS 8 BIT
ADDRESSABLE LATCH fabricated with silicon
gate C2 MOS technology.
The M74HC259 has single data input (D) 8 latch
outputs (Q0-Q7), 3 address inputs (A, B, and C),
common enable input (E), and a common CLEAR
input. To operate this device as an addressable
latch, data is held on the D input, and the address
of the latch into which the data is to be entered is
held on the A, B, and C inputs. When ENABLE is
taken low the data flows through to the addresses
output. The data is stored on the positive-going
edge of the ENABLE pulse. All unaddressed
latches will remain unaffected. With ENABLE in
the high state the device is deselected and all
latches remain in their previous state, unaffected
by changes on the data or address inputs. To
eliminate the possibility of entering erroneous data
into the latches, the ENABLE should be held high
(inactive) while the address lines are changing. If
ENABLE is held high and CLEAR is taken low all
eight latches are cleared to the low state. If
ENABLE is low all latches except the addressed
latch will be cleared. The addressed latch will
instead follow the D input, effectively
implementing a 3-to-8 line decoder.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC2598 BIT ADDRESSABLE LATCH
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC2592/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE D : The level at the data input
Qi0 : The level before the indicated steady state input conditions where established, (i = 0, 1, ......., 7).
M74HC2593/13
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC2594/13
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC2595/13
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC2596/13
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
M74HC2597/13
WAVEFORM 2 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
WAVEFORM 3 : MINIMUM PULSE WIDTH (G), SETUP AND HOLD TIME (D TO G)(f=1MHz; 50% duty cycle)
