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M74HC132B1R-M74HC132M1R-M74HC132RM13TR
QUAD 2-INPUT SCHMITT NAND GATE
1/9March 2002 HIGH SPEED:
tPD = 11ns (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC = 1μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:H (TYP.) = 0.9 V AT VCC = 5 V SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 132
DESCRIPTIONThe M74HC132 is an high speed CMOS QUAD
2-INPUT SCHMITT NAND GATE fabricated with
silicon gate C2 MOS technology.
Pin configuration and function are identical to
those of the M74HC00.
The hysteresis characteristics (around 20% Vcc)
of all inputs allow slowly changing input signals to
be transformed into sharply defined jitter-free
output signals.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC132QUAD 2-INPUT SCHMITT NAND GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC1322/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) Power difssipation at 65 °C. Derating from 65°C to 125°C: DIP Package -10mW/°C; SO Package -7mW/°C; TSSOP Package -6.1mW/°C
RECOMMENDED OPERATING CONDITIONS
M74HC1323/9
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC1324/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
M74HC1325/9
WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
