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M68AF031AM55MS6T-M68AF031AM55MS6U-M68AF031AM70MS6U-M68AF031AM70N6-M68AF031AM70N6T
256 KBIT (32K X 8) 5.0V ASYNCHRONOUS SRAM
1/22November 2004
M68AF031A256 Kbit (32K x 8) 5.0V Asynchronous SRAM
FEATURES SUMMARY SUPPLY VOLTAGE: 4.5 to 5.5V 32K x 8 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIME: 55, 70ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 2V TRI-STATE COMMON I/O AUTOMATIC POWER DOWN PACKAGES SO28, PDIP28, TSOP28 Standard and
Reverse Pinout. TSOP28 Standard Available in Lead-Free
Version
M68AF031A
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 3. SO Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 4. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 5. TSOP Connections (Normal). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 6. TSOP Connections (Reverse) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 7. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Table 2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8Table 3. Operating and AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Figure 8. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Figure 9. AC Measurement Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Table 4. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 5. DC Characteristics (M68AF031A-55 and M68AF031A-70). . . . . . . . . . . . . . . . . . . . . . . .9
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Table 6. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Figure 10.Address Controlled, Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 11.Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. . . . . . . . . . . . .11
Figure 12.Chip Enable Controlled, Standby Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 7. Read and Standby Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13Figure 13.Write Enable Controlled, Write AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Figure 14.Chip Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 8. Write Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Figure 15.Low VCC Data Retention AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 9. Low VCC Data Retention Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16Figure 16.SO28 - 28 lead Plastic Small Outline, 300 mils body width, Package Outline . . . . . . . .16
Table 10. SO28 - 28 lead Plastic Small Outline, 300 mils body width, Package Mechanical Data.16
Figure 17.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . .17
Table 11. PDIP28 - 28 pin Plastic DIP, n600 mils width, Package Mechanical Data . . . . . . . . . . .17
Figure 18.TSOP28 - 28 lead Normal Pinout Plastic Small Outline, Package Outline . . . . . . . . . . .18
Table 12. TSOP28 - 28 lead Normal Pinout Plastic Small Outline, Package Mechanical Data . . .18
3/22
M68AF031AFigure 19.TSOP28 - 28 lead Reverse Pinout Plastic Small Outline, Package Outline . . . . . . . . . .19
Table 13. TSOP28 - 28 lead Reverse Pinout Plastic Small Outline, Package Mechanical Data. . .19
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20Table 14. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21Table 15. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
M68AF031A
SUMMARY DESCRIPTIONThe M68AF031A is a 256 Kbit (262,144 bit) CMOS
SRAM, organized as 32,768 bytes. The device
features fully static operation requiring no external
clocks or timing strobes, with equal address ac-
cess and cycle times. It requires a single 4.5 to
5.5V supply. This device has an automatic power-
down feature, reducing the power consumption by
over 99% when deselected.
The M68AF031A is available in SO28 (28-lead
Small Outline), PDIP28 (28-pin Plastic Dual-In-
Line) and TSOP28 (28-lead Thin Small Outline,
Standard and Reverse Pinout) packages.
In addition to the standard version, the TSOP28
Standard package is also available in Lead-free
version (standard and Tape & Reel packing), in
compliance with JEDEC Std J-STD-020B, the ST
ECOPACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive. It
is also compliant with Lead-free soldering pro-
cesses.
Table 1. Signal Names
5/22
M68AF031A
M68AF031A
7/22
M68AF031A
MAXIMUM RATING
Stressing the device above the rating listed in the
Absolute Maximum Ratings table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for periods greater than 1 sec periods may
affect device reliability. Refer also to the STMicro-
electronics SURE Program and other relevant
quality documents.
Table 2. Absolute Maximum Ratings
Note:1. One output at a time, not to exceed 1 second duration. Up to a maximum operating VCC of 6.0V only. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assembly), the ST ECOPACK® 7191395 specification,
and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU.
M68AF031A
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 3. Operating and AC Measurement Conditions
9/22
M68AF031A
Table 4. Capacitance
Note:1. Sampled only, not 100% tested. At TA = 25°C, f = 1 MHz, VCC = 5.0V.
Table 5. DC Characteristics (M68AF031A-55 and M68AF031A-70)
Note:1. Average AC current, cycling at tAVAV minimum. E = VIL, VIN = VIL OR VIH. E ≤ 0.2V, VIN ≤ 0.2V OR VIN ≥ VCC –0.2V. Output disabled.
M68AF031A
OPERATION
The M68AF031A has a Chip Enable power down
feature which invokes an automatic standby mode
whenever Chip Enable is de-asserted (E= High).
An Output Enable (G) signal provides a high
speed tri-state control, allowing fast read/write cy-
cles to be achieved with the common I/O data bus.
Operational modes are determined by device con-
trol inputs W and E, as summarized in the Operat-
ing Modes table (see Table 6., Operating Modes).
Table 6. Operating Modes
Note:1. X = VIH or VIL.
Read Mode
The M68AF031A is in the Read mode whenever
Write Enable (W) is High with Output Enable (G)
Low, and Chip Enable (E) is asserted. This pro-
vides access to data of the 262,144 locations in
the static memory array, specified by the 15 ad-
dress inputs. Valid data will be available at the
eight output pins within tAVQV after the last stable
address, providing G is Low and E is Low. If Chip
Enable or Output Enable access times are not
met, data access will be measured from the limit-
ing parameter (tELQV or tGLQV) rather than the ad-
dress. Data out may be indeterminate at tELQX and
tGLQX but data lines will always be valid at tAVQV.
Note: E = Low, G = Low, W = High.
11/22
M68AF031A
Note: Write Enable (W) = High.
