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M41T01
Low-power serial real-time clock (RTC) with built-in battery switchover circuit
October 2013 DocID025389 Rev 2 1/24
M41T01Low-power serial real-time clock (RTC)
with built-in battery switchover circuit
Datasheet - production data
Features 2.0 to 5.5 V clock operating voltage Counters for seconds, minutes, hours, day,
date, month, years, and century Software clock calibration Automatic switchover and deselect circuitry Ultra-low battery supply current of 800 nA Low operating current of 300 μA Battery and capacitor backup Battery backup not recommended for 3.0 V
applications (capacitor backup only) Operating temperature of –40 to 85 °C Automatic leap year compensation
DescriptionThe M41T01 is a low-power serial real-time clock
(RTC). The built-in 32.768 kHz oscillator circuit
works with an external crystal and does not need
any load capacitors.
The M41T01 clock has a built-in power sense
circuit which detects power failures and
automatically switches to the battery supply
during power failures. Eight bytes of the RAM are
used for the clock/calendar function and are
configured in binary-coded decimal (BCD) format.
Addresses and data are transferred serially via a
two-line bidirectional bus. The built-in address
register is incremented automatically after each
WRITE or READ data byte. The energy needed to
sustain the RAM and clock operations can be
supplied from a small lithium coin cell.
Typical data retention time is in excess of 5 years
with a 50 mA/h 3 V lithium cell. The M41T01 is
supplied in an 8-lead plastic small outline
package.
Contents M41T012/24 DocID025389 Rev 2
Contents Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Data retention mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Clock operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.1 Clock calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Output driver pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package mechanical information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID025389 Rev 2 3/24
M41T01 List of tables
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Table 2. Register map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Table 4. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 5. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 6. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 7. Crystal electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 8. Power down/up AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 9. Power down/up trip points DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 10. SO8 – 8-lead plastic small outline package mechanical data. . . . . . . . . . . . . . . . . . . . . . .21
Table 11. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Table 12. Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
List of figures M41T01
4/24 DocID025389 Rev 2
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 2. SOIC connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Figure 4. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Figure 5. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 6. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 7. READ mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 8. Alternate READ mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 9. WRITE mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 10. Crystal accuracy across temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Figure 11. Clock calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Figure 12. AC testing input/output waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Figure 13. Power down/up mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Figure 14. SO8 – 8-lead plastic small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
DocID025389 Rev 2 5/24
M41T01 Device overview
1 Device overview
Device overview M41T01 DocID025389 Rev 2
DocID025389 Rev 2 7/24
M41T01 Operation
2 Operation
The M41T01 clock operates as a slave device on the serial bus. Access is obtained by
implementing a start condition followed by the correct slave address (D0h). The 8 bytes
contained in the device can then be accessed sequentially in the following order: Seconds register
2. Minutes register
3. Century/hours register
4. Day register
5. Date register
6. Month register
7. Years register
8. Control register
The M41T01 clock continually monitors VCC for an out of tolerance condition. Should VCC
fall below VSO, the device terminates an access in progress and resets the device address
counter. Inputs to the device will not be recognized at this time to prevent erroneous data
from being written to the device from an out of tolerance system. When VCC falls below VSO,
the device automatically switches over to the battery and powers down into an ultra low
current mode of operation to conserve battery life. Upon power-up, the device switches from
battery to VCC at VSO and recognizes inputs.
2.1 2-wire bus characteristics
This bus is intended for communication between different ICs. It consists of two lines: one
bi-directional for data signals (SDA) and one for clock signals (SCL). Both the SDA and the
SCL lines must be connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined: Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high.
Changes in the data line while the clock line is high will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined: Bus not busy
Both data and clock lines remain high. Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines
the START condition. Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines
the STOP condition.
Operation M41T01
8/24 DocID025389 Rev 2
DocID025389 Rev 2 9/24
M41T01 Operation
Operation M41T01
10/24 DocID025389 Rev 2
2.2 READ mode
The M41T01 slave transmitter will now place the data byte at address An+1 on the bus. The
This cycle of reading consecutive addresses will continue until the master receiver sends a
An alternate READ mode may also be implemented, whereby the master reads the M41T01
DocID025389 Rev 2 11/24
M41T01 Operation
Operation M41T01
12/24 DocID025389 Rev 2
2.3 WRITE mode
In this mode the master transmitter transmits to the M41T01 slave receiver. Bus protocol is
shown in Figure 9. Following the START condition and slave address, a logic '0' (R/W = 0) is
placed on the bus and indicates to the addressed device that word address An will follow
and is to be written to the on-chip address pointer. The data word to be written to the
memory is strobed in next and the internal address pointer is incremented to the next
memory location within the RAM on the reception of an acknowledge clock. The M41T01
slave receiver will send an acknowledge clock to the master transmitter after it has received
the slave address and again after it has received the word address and each data byte (see
Figure 6 on page 10).
2.4 Data retention mode
With valid VCC applied, the M41T01 can be accessed as described above with READ or
WRITE Cycles. Should the supply voltage decay, the M41T01 will automatically deselect,
write protecting itself when VCC falls (see Figure 13 on page 20).
