M27C801-100F6 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMapplications where the content is programmed20 8only one time and erasure is not required, theM27C8 ..
M27C801-120F1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMM27C8018 Mbit (1Mb x 8) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READ OPERATION■ ACCESS T ..
M27C801-55F1 , 8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
M27C801-55F6 , 8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
M27C801-55K1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMAbsolute Maximum Ratings" maycause permanent damage to the device. These are stress ratings only an ..
M27C801-55K1 ,8 MBIT (1MB X 8) UV EPROM AND OTP EPROMapplications where the content is programmed20 8only one time and erasure is not required, theM27C8 ..
M48T08-100PC1 ,64K (8K X 8) TIMEKEEPER SRAMBlock Diagram . . 5OPERATION MODES . . . . . . . 6Table 2. Operating Modes 6RE ..
M48T08-150PC1 ,64K (8K X 8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesA0-A12 Address InputsVCCDQ0-DQ7 Data Inputs / Outputs13 8INT Pow ..
M48T08Y-10MH1 ,64K (8K X 8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesA0-A12 Address InputsVCCDQ0-DQ7 Data Inputs / Outputs13 8INT Pow ..
M48T08Y-10MH1E ,64K (8K X 8) TIMEKEEPER SRAMM48T08M48T08Y, M48T18® 5V, 64 Kbit (8 Kb x8) TIMEKEEPER SRAM
M48T12-150PC1 ,16 KBIT (2KB X8) TIMEKEEPER SRAMLogic Diagram . . 4Table 1. Signal Names . . 4Figure 3. DIP Connections 4Figur ..
M48T12-200PC1 ,16 KBIT (2KB X8) TIMEKEEPER SRAMLogic Diagram Table 1. Signal NamesA0-A10 Address InputsVCCDQ0-DQ7 Data Inputs / Outputs11 8E Chip ..
M27C801-100B1-M27C801-100F1-M27C801-100F6-M27C801-120F1-M27C801-55K1-M27C801-80F1-M27C801-90F1
8 MBIT (1MB X 8) UV EPROM AND OTP EPROM
1/16September 2000
M27C8018 Mbit (1Mb x 8) UV EPROM and OTP EPROM 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION ACCESS TIME: 45ns LOW POWER CONSUMPTION: Active Current 35mA at 5MHz Standby Current 100μA PROGRAMMING VOLTAGE: 12.75V ± 0.25V PROGRAMMING TIME: 50μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 42h
DESCRIPTIONThe M27C801 is an 8 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applica-
tions where fast turn-around and pattern experi-
mentation are important requirements and is
organized as 1,048,576 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
has transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C801 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
M27C801
Table 1. Signal Names
3/16
M27C801
Table 2. Absolute Maximum Ratings (1)Note:1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Depends on range.
Table 3. Operating Modes Note: X = VIH or VIL, VID = 12V ± 0.5V.
Table 4. Electronic Signature
M27C801
DEVICE OPERATION The operating modes of the M27C801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GVPP and 12V on A9 for Elec-
tronic Signature and Margin Mode Set or Reset.
Read Mode The M27C801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV.
Standby Mode The M27C801 has a standby mode which reduces
the supply current from 35mA to 100μA.
The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E input. When
in the standby mode, the outputs are in a high im-
pedance state, independent of the GVPP input.
Table 5. AC Measurement Conditions
Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz)
Note:1. Sampled only, not 100% tested.
5/16
M27C801
Table 7. Read Mode DC Characteristics (1)(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Maximum DC voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1)(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested. Speed obtained with High Speed AC measurement conditions.
Two Line Output Control Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows: the lowest possible memory power dissipation, complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
M27C801
Table 8B. Read Mode AC Characteristics (1)(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
System Considerations The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1μF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7μF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
7/16
M27C801
Table 9. Programming Mode DC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 10. MARGIN MODE AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
ProgrammingWhen delivered (and after each erasure for UV
EPROM), all bits of the M27C801 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’ will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’ is by die exposure to ultraviolet
light (UV EPROM). The M27C801 is in the pro-
gramming mode when VPP input is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data in-
puts are TTL. VCC is specified to be 6.25V ±
0.25V.
M27C801
Table 11. Programming Mode DC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
