M27C1001 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMAbsolute Maximum Ratings" maycause permanent damage to the device. These are stress ratings only an ..
M27C1001 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMapplications where the content is programmedV VCC PPonly one time and erasure is not required, theM ..
M27C1001-10B1 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMM27C10011 Mbit (128Kb x8) UV EPROM and OTP EPROM■ 5V ± 10% SUPPLY VOLTAGE in READ OPERATION■ ACCESS ..
M27C1001-10C1 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMAbsolute Maximum Ratings" maycause permanent damage to the device. These are stress ratings only an ..
M27C1001-10C-1 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMapplications where the content is programmedV VCC PPonly one time and erasure is not required, theM ..
M27C1001-10F1 ,1 MBIT (128KB X8) UV EPROM AND OTP ROMapplications where the content is programmedV VCC PPonly one time and erasure is not required, theM ..
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M27C1001
1 MBIT (128KB X8) UV EPROM AND OTP ROM
1/17June 2002
M27C10011 Mbit (128Kb x8) UV EPROM and OTP EPROM 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION ACCESS TIME: 35ns LOW POWER CONSUMPTION: Active Current 30mA at 5Mhz Standby Current 100μA PROGRAMMING VOLTAGE: 12.75V ± 0.25V PROGRAMMING TIME: 100μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 05h
DESCRIPTIONThe M27C1001 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organized as 131,072 words of 8 bits.
The FDIP32W (window ceramic frit-seal package)
and the LCCC32W (leadless chip carrier package)
have a transparent lids which allow the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C1001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
M27C10012/17
Table 1. Signal Names
3/17
M27C1001
Table 2. Absolute Maximum Ratings (1)Note:1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Depends on range.
Table 3. Operating ModesNote: X = VIH or VIL, VID = 12V ± 0.5V.
Table 4. Electronic Signature
M27C10014/17
DEVICE OPERATIONThe operating modes of the M27C1001 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for VPP and 12V on A9 for Electronic
Signature.
Read Mode The M27C1001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV.
Standby Mode The M27C1001 has a standby mode which reduc-
es the supply current from 30mA to 100μA. The
M27C1001 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Table 5. AC Measurement Conditions
Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz)
Note:1. Sampled only, not 100% tested.
5/17
M27C1001
Table 7. Read Mode DC Characteristics (1)(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Maximum DC voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1)(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested. Speed obtained with High Speed AC measurement conditions.
Two Line Output Control Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows: the lowest possible memory power dissipation, complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
M27C10016/17
Table 8B. Read Mode AC Characteristics (1)(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
System Considerations The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1μF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7μF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
7/17
M27C1001
Table 9. Programming Mode DC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 10. Programming Mode AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
Programming When delivered (and after each erasure for UV
EPROM), all bits of the M27C1001 are in the '1'
state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposition to ultravio-
let light (UV EPROM). The M27C1001 is in the
programming mode when VPP input is at 12.75V,
E is at VIL and P is pulsed to VIL. The data to be
programmed is applied to 8 bits in parallel to the
data output pins. The levels required for the ad-
dress and data inputs are TTL. VCC is specified to
be 6.25V ± 0.25V.
M27C10018/17
PRESTO II Programming Algorithm PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 13 seconds. Program-
ming with PRESTO II involves in applying a se-
quence of 100μs program pulses to each byte until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. No overprogram pulse is applied since the
verify in MARGIN MODE provides necessary mar-
gin to each programmed cell.
Program Inhibit Programming of multiple M27C1001s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C1001 may be common. A TTL low level
pulse applied to a M27C1001's P input, with E low
and VPP at 12.75V, will program that M27C1001.
A high level E input inhibits the other M27C1001s
from being programmed.
Program Verify A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
and G at VIL, P at VIH, VPP at 12.75V and VCC at
6.25V.
9/17
M27C1001
Electronic Signature The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C1001. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C1001, with VPP = VCC = 5V. Two identifier
bytes may then be sequenced from the device out-
puts by toggling address line A0 from VIL to VIH. All
other address lines must be held at VIL during
Electronic Signature mode.
Byte 0 (A0 = VIL) represents the manufacturer
code and byte 1 (A0 = VIH) the device identifier
code. For the STMicroelectronics M27C1001,
these two identifier bytes are given in Table 4 and
can be read-out on outputs Q7 to Q0.
ERASURE OPERATION (applies to UV EPROM)The erasure characteristics of the M27C1001 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo-
rescent lighting could erase a typical M27C1001 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C1001 is to be exposed to
these types of lighting conditions for extended pe-
riods of time, it is suggested that opaque labels be
put over the M27C1001 window to prevent unin-
tentional erasure. The recommended erasure pro-
cedure for the M27C1001 is exposure to short
wave ultraviolet light which has a wavelength of
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 15 W-sec/cm2 . The erasure time with this dos-
age is approximately 15 to 20 minutes using an ul-
traviolet lamp with 12000 μW/cm2 power rating.
The M27C1001 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
