LP2997MR ,DDR-II Termination RegulatorApplicationsAn additional feature found on the LP2997 is an active lowshutdown (SD) pin that provid ..
LP2997MR ,DDR-II Termination RegulatorFeaturesn Source and sink currentThe LP2997 linear regulator is designed to meet the JEDECSSTL-18 s ..
LP2997MRX ,DDR-II Termination RegulatorElectrical CharacteristicsSpecifications with standard typeface are for T = 25°C and limits in bold ..
LP2997MRX ,DDR-II Termination RegulatorApplicationsAn additional feature found on the LP2997 is an active lowshutdown (SD) pin that provid ..
LP2997MRX ,DDR-II Termination RegulatorFeaturesn Source and sink currentThe LP2997 linear regulator is designed to meet the JEDECSSTL-18 s ..
LP2997MX ,DDR-II Termination RegulatorLP2997 DDR-II Termination RegulatorJune 2004LP2997DDR-II Termination Regulator
LT1009CLPR ,2.5-V Integrated Reference Circuit(1)ORDERING INFORMATION(2)T PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKINGATube of 75 LT1009CDSOIC ..
LT1009CZ ,2.5V Reference
LT1009CZ#PBF ,2.5V Reference
LT1009CZ#PBF ,2.5V Reference
LT1009IDR ,2.5-V Integrated Reference Circuit(1)ORDERING INFORMATION(2)T PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKINGATube of 75 LT1009CDSOIC ..
LT1009ILPR ,2.5-V Integrated Reference CircuitMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)MIN MAX UNITI Reve ..
LP2997M-LP2997MR-LP2997MRX-LP2997MX
DDR-II Termination Regulator
LP2997
DDR-II Termination Regulator
General DescriptionThe LP2997 linear regulatoris designedto meetthe JEDEC
SSTL-18 specificationsfor terminationof DDR-II memory.
The device containsa high-speed operational amplifierto
provide excellent responseto load transients. The output
stage prevents shoot through while delivering 500mA con-
tinuous current and transient peaksupto 900mAin the
applicationas requiredfor DDR-II SDRAM termination. The
LP2997 also incorporatesa VSENSEpinto provide superior
load regulation anda VREF outputasa referencefor the
chipset and DIMMs. additional feature foundon the LP2997isan active low
shutdown (SD) pin that provides SuspendTo RAM (STR)
functionality. When SDis pulled low the VTT output will
tri-state providinga high impedance output, but, VREF will
remain active.A power savings advantage canbe obtained this mode through lower quiescent current.
Features Source and sink current Low output voltage offset No external resistors required Linear topology Suspendto Ram (STR) functionality Low external component count Thermal Shutdown Availablein SO-8, PSOP-8 packages
Applications DDR-II Termination Voltage SSTL-18 Termination
Typical Application CircuitJune 2004
LP2997
DDR-II
ermination
Regulator
