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LP2996LQXNOPB-LP2996M/NOPB-LP2996MR/NOPB-LP2996MRX-LP2996MRX/NOPB-LP2996MX/NOPB
DDR Termination Regulator
Copyright © 2016,
220 PF
36
VTT
LP2996A
PVIN
VDDQ
VREF
AVIN
VREF = 0.75 V
VSENSE
GND47 PF
VDDQ = 1.5 V
VDD = 2.5 V
VTT = 0.75 VSD
0.01PF
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Design
LP2996-N, LP2996ASNOSA40K–NOVEMBER 2002–REVISED DECEMBER 2016
LP2996-N, LP2996A DDR Termination Regulator Features Minimum VDDQ: 1.8V (LP2996-N) 1.35V (LP2996A) Source and Sink Current Low Output Voltage Offset No External Resistors Required for Setting Output
Voltage Linear Topology Suspendto Ram (STR) Functionality Stable With Ceramic Capacitors With Appropriate
ESR Low External Component Count Thermal Shutdown
Applications LP2996-N: DDR1 and DDR2 Termination Voltage LP2996A: DDR1, DDR2, DDR3, and DDR3L
Termination Voltage FPGA Industrial and Medical PC SSTL-2 and SSTL-3 Termination HSTL Termination
DescriptionThe LP2996-N and LP2996A linear regulators are
designedto meet the JEDEC SSTL-2 specifications
for termination of DDR-SDRAM. The device also
supports DDR2, while LP2996A supports DDR3 and
DDR3L VTT bus termination with VDDQ minimumof
1.35V. The device containsa high-speed operational
amplifier to provide excellent response to load
transients. The output stage prevents shoot through
while delivering 1.5-A continuous current and
transient peaks up to3A in the application as termination. The LP2996-Na VSENSE pin to regulation anda VREF output the chipset and DIMMs. additional feature found on the LP2996-N and
LP2996Ais an active-low shutdown (SD) pin that
provides Suspend To RAM (STR) functionality. Whenis pulled low the VTT output will tri-state providing high impedance output, but VREF remains active.A
power savings advantage can be obtainedin this
mode through lower quiescent current. recommends the LP2998 and LP2998-Q1 devices
for automotive applications and DDR applications that
require operatingat temperatures below zero.
WEBENCH® design tools can be usedby application
designers to generate, optimize, and simlulate
applications using the LP2998 and LP2998-Q1.
Device Information(1)(1) Forall available packages, see the orderable addendum
the endofthe data sheet.
Simplified Schematic
