LP2996MX ,DDR Termination RegulatorLP2996 DDR Termination RegulatorNovember 2003LP2996DDR Termination Regulator
LP2996MX/NOPB ,1.5A DDR Termination Regulator with Shutdown Pin 8-SOIC 0 to 125FeaturesLP2996A is an active-low shutdown (SD) pin that1• Minimum V :DDQprovides Suspend To RAM (ST ..
LP2996MX/NOPB ,1.5A DDR Termination Regulator with Shutdown Pin 8-SOIC 0 to 125Electrical Characteristics....... 611.3 Receiving Notification of Documentation Updates 236.6 Typic ..
LP2997M ,DDR-II Termination RegulatorLP2997 DDR-II Termination RegulatorJune 2004LP2997DDR-II Termination Regulator
LP2997MR ,DDR-II Termination RegulatorApplicationsAn additional feature found on the LP2997 is an active lowshutdown (SD) pin that provid ..
LP2997MR ,DDR-II Termination RegulatorFeaturesn Source and sink currentThe LP2997 linear regulator is designed to meet the JEDECSSTL-18 s ..
LT1009CDR ,2.5-V Integrated Reference CircuitLT1009
LT1009CDRG4 ,2.5-V Integrated Reference Circuit 8-SOIC 0 to 70/packaging.SCHEMATICCATHODEQ14 Q1124 kΩ 24 kΩ 6.6 kΩQ8Q720 pF30 pF Q1010 kΩ500 ΩQ2Q930 kΩQ4ADJQ16.6 ..
LT1009CLP ,2.5-V Integrated Reference Circuit.(2) Package drawings, thermal data, and symbolization are available at
LT1009CLP ,2.5-V Integrated Reference Circuit........ SLVS013N–MAY 1987–REVISED MAY 2009(1)ABSOLUTE
LT1009CLPE3 ,2.5-V Integrated Reference Circuit 3-TO-92 0 to 70maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
LT1009CLPR ,2.5-V Integrated Reference Circuit(1)ORDERING INFORMATION(2)T PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKINGATube of 75 LT1009CDSOIC ..
LP2996-LP2996LQ-LP2996LQX-LP2996M-LP2996MR-LP2996MX
DDR Termination Regulator
LP2996
DDR Termination Regulator
General DescriptionThe LP2996 linear regulatoris designedto meetthe JEDEC
SSTL-2 specificationsfor terminationof DDR-SDRAM. The
device containsa high-speed operational amplifierto provide
excellent responseto load transients. The output stage pre-
vents shoot through while delivering 1.5A continuous current
and transient peaksupto3Ain the applicationas required
for DDR-SDRAM termination. The LP2996 also incorporates
aVSENSEpinto provide superior load regulation anda VREF
outputasa referenceforthe chipset and DIMMs. additional feature foundon the LP2996isan active low
shutdown (SD) pin that provides SuspendTo RAM (STR)
functionality. When SDis pulled low the VTT output will
tri-state providinga high impedance output, but, VREF will
remain active.A power savings advantage canbe obtained this mode through lower quiescent current.
Features Source and sink current Low output voltage offset No external resistors required Linear topology Suspendto Ram (STR) functionality Low external component count Thermal Shutdown Availablein SO-8, PSOP-8or LLP-16 packages
Applications DDR-I and DDR-II Termination Voltage SSTL-2 and SSTL-3 Termination HSTL Termination
Typical Application CircuitNovember 2003
LP2996
DDR
ermination
Regulator
