LP2994MX ,DDR Termination RegulatorElectrical Characteristics Specifications with standard typeface are for T = 25˚C and limits in bol ..
LP2995 ,DDR Termination RegulatorPin DescriptionSO-8 Pin LLP Pin Name Function1 1,3,4,6,9, 13,16 NC No internal connection. Can be u ..
LP2995LQ ,DDR Termination RegulatorPin DescriptionSO-8 Pin orLLP Pin Name FunctionPSOP-8 Pin1 1,3,4,6,9, 13,16 NC No internal connecti ..
LP2995LQX ,DDR Termination RegulatorLP2995 DDR Termination RegulatorAugust 2004LP2995DDR Termination Regulator
LP2995M ,DDR Termination RegulatorPin DescriptionSO-8 Pin orLLP Pin Name FunctionPSOP-8 Pin1 1,3,4,6,9, 13,16 NC No internal connecti ..
LP2995MR ,DDR Termination RegulatorFeaturesn Low output voltage offsetThe LP2995 linear regulator is designed to meet the JEDECSSTL-2 ..
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LP2994M-LP2994MX
DDR Termination Regulator
LP2994
DDR Termination Regulator
General DescriptionThe LP2994 regulatoris designedto providea linear solution meetthe JEDEC SSTL-2 and SSTL-3 specifications (Se-
ries Stub Termination Logic)for active terminationof DDR-
SDRAM. The device utilizesan internal operational amplifier provide linear regulationof VTT without the need for
expensive external components. The output stage prevents
shoot through while delivering 1.5A continuous current and
maintaining excellent load regulation. The LP2994 alsoin-
corporatesan active low shutdownpinto tri-statethe output
during SuspendTo Ram (STR) states.
Patents Pending
Features Source and sink current Low external component count Independent analog and power rails Linear topology Small package SO-8 Low cost and easyto use Shutdownpin
Applications SSTL-2 SSTL-3 DDR-SDRAM Termination DDR-II Termination
Typical Application CircuitFIGURE1. SSTL-2 VTT Termination
May 2002
LP2994
DDR
ermination
Regulator
