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LMC2626IM
CMOS LDOR/Buffer Chip for Row Inversion Flat Panel Display Systems
TL/H/12541
LMC2626
CMOS
LDOR/Buffer
Chip
for
Row
Inversion
Flat
Panel
Display
Systems
PRELIMINARY
November 1995
LMC2626
CMOS LDOR/Buffer Chip for Row
Inversion Flat Panel Display Systems
General Description
The LMC2626 integrated circuitis specifically developedforrow inversion TFT FPD system architecture.Itis designed
onlytobe usedin conjunction with National’s LM2625
switching regulator chip.
Builton National’s advanced CMOS CS80 process, thischip
generatesa high-power, precision square-wave froma digi-
tal sync signal. The chip also contains thermal shutdown
circuitry, system shutdown circuitry, andalow drop-out volt-
age regulatorto generatea4.2volt supply froman external- applied reference voltageof 1.227V.
Features Usedin conjunction with LM2625 chip High output current buffer Low bufferon resistance System shutdown control LDO voltage regulator LDOR dropout 0.3V maximumat 150mA Thermal shutdown/short circuit protection External reference requiredfor LDOR VREFpin convertstoa digitalpinto shutdown LM2625
Connection Diagram
8-PinSO
TL/H/12541–1
Top View
Pin Description
PinÝ Pin Name Description
1VREF 1.218Vto 1.242VExt. Reference
from LM2625 (seeNote8)
2SD System Shutdown inputpinfor
LMC2626 andLMC2625 SYNC Digital input square wave from FPD
controller GND Ground P5V PrecisionRegulated a5VSupply
6VOUT PowerBuffer Output
7VIN FPDSystemSupply (a4.5Vto
a5.5V)
8VSH Low Drop-Out Voltage Regulator
Output
Ordering Information
Package TemperatureRange NSC Transport
b40§Cto a85§C Drawing Media
8-PinSO LMC2626IM M08A Rail
Tapeand
Reel
C1996National SemiconductorCorporation RRD-B30M26/PrintedinU.S.A.
