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LH4033CNN/a7avai+/-40 V, +/-100 mA, 1.5 W, fast and ultra fast buffer amplifier


LH4033CN ,+/-40 V, +/-100 mA, 1.5 W, fast and ultra fast buffer amplifierElectrical Characteristics TA = 25°C, vs = i15V, Rs = 50n, EL = 1.0 kn (Note 6) Limits Parameter ..
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LH4033CN
+/-40 V, +/-100 mA, 1.5 W, fast and ultra fast buffer amplifier
LH4033C/LH4063C
National
Semiconductor
LH4033C/LH4063C Fast and
Ultra Fast Buffer Amplifiers
General Description
The LH4033C and LH4063C are high speed, FET input,
voltage follower/buffers designed to provide high current
drive at frequencies from DC to over 100 MHz. The
LH4033C will provide :10 mA into 1 kn. loads (i100 mA
peak) at slew rates of 1500 V/ps. The LH4063C will provide
1250 mA into 500 loads (i500 mA peak) at slew rates of
up to 6000 Nlps. In addition, both exhibit excellent phase
Features
a Fast (LH4063)
l: Wide range single or dual supply operation
a Wide power bandwidth DC to 100 MHz
Ct High output drive i 10V with tion load
I: Low phase non-linearity 2"
a Fast rise times 2 ns
6000 V/ps
linearity up to 20 MHz a High current gain 120 dB
. . . . . I: High input resistance 1010!)
Both are intended to fulfill a wide range of buffer applica-
tions such as high speed line drivers, video impedance . .
transformation, nuclear instrumentation amplifiers, op amp Appllcatlons
isolation buffer for driving reactive loads and high imped- n High speed ATE
ance input buffers for high speed ADCs and comparators. In D Coaxial cable driver
addition, the LH4063C can continuously drive 500 coaxial n Isolation buffer
cables or be used as a diddle yoke driver for high resolution I: High speed S/ H amplifier
CRT displays. For additional applications information, see a High frequency filter
AN-48. a Flash A/D buffer
These devices are constructed using specialty selected
junction FETs and active laser trimming to achieve guaran-
teed performance specifications. The LH4033C and
LH40630 are specified from --25''C to +85°C. The
LH4033C is available in a 16-pin plastic DIP. The LH4063C
is available in an 11-Iead TO-220 package.
Connection Diagrams
11mm rc-I, . inc
1ov+ v-?.. Is-yt:
9 Vc’ vc-'. u-~N<:
8 NC INPUT-J- ivy,
7 NC orrsn siuusr-5, l-2--oun>ur
s OUTPUT OFFSET tterm-f-, l-Nc
5 NC w--'- inc
4 llc- e--'-' 2.-ec
TUK/10008-2
2 orrsn hi)J0ST 16-Lead Molded Dual-ln-Llne Package
l OFFSET PRES“ Order Number LH4033CN
See NS Package Number N16A
TLIK/10008-1
11-Lead TO-220
Order Number LH4063CT
See NS Package Number TA11A
Absolute Maximum Ratings
" MllltarylAerospace trpeelfled devlces are required,
Peak Output Current
please contact the National Semiconductor Sales LH40630 i500 mA
Otmte/DlBtrlttutttrs for availability and trpettlfitttttltms. LH40330 i250 mA
Supply Voltage (V + - V-) 40V Operating Temperature Range
Maximum Power Dissipation (See Curves) LH4033C and LH4063C -25''C to + 85°C
LH4063C 5W Storage Temperature Range -65t to + 150°C
LH4033C 1.5W Lead Temperature (Soldering, 10 sec.) 300°C
Maximum Junction Temperature 175°C
Input Voltage t Vs
Continuous Output Current
LH40630 l 250 mA
LH4033C l 100 mA
DC Electrical Characteristics Vs = i15V, TMIN tg TA s TMAX unless otherwise specified (Note 1)
Parameter Conditions LH4033C Units
Min Typ Max
Output Offset Voltage Rs = 1000,11 = 25°C, VIN = 0V 12 20 mV
Rs = 100n (Note 2) 25 mV
Average Temperature Coefficient Rs = 1000,V|N = 0V tt
ofOffsetVoltage (Note 3) 50 100 tW/ C
Input Bias Current VIN = 0V Tg = 25°C (Note 2) 500 pA
TA = 25°C (Note 4) 5.0 nA
Ts = TA = TMAX 20 nA
Voltage Gain vo = :10V, Rs = 1000,
EL = 1.0 kn 0.96 0.98 1.00 V/V
Inputlmpedance RL = 1 kn 1010 1011 ft
Outputlmpedance VIN = :t1.0V, RL = 1.0k 6.0 10 n
OutputVoltage Swing V. = t14V, RL = 1.0k i12 V
V; = i10.5V, RL = 100n, TA = 25°C 19.0 V
Supply Current VIN = 0V (Note 5), No Load 21 24 mA
Power Consumption VIN = 0V (No Load) 630 720 mW
AC Electrical Characteristics TA = 25''C, vs = :15v, Rs = 50n, EL = 1.0 m (Note 6)
Parameter Conditions LH4033C Unlts
Min Typ Max
Slew Rate V»; = t10V 1000 1400 V/ps
Bandwidth VIN = 1.0 Vrms 100 MHz
Phase Nonlinearity BW = 1.0 to 20 MHz 2.0 Degrees
Rise Time AVIN = 0.5V 3.2 ns
Propagation Delay Avm = 0.5V 1.5 ns
Harmonic Distortion f > 1 kHz <0.1 %
Note 1: LH40336 is 100% production tested at 25°C only. Spsrerficatians at temperature extremes are verified by sample ttasting, but these limits are not used to
calculate outgoing quality level.
Note 2: SpistSticatiort is at25Tlunthlort temperature due to requirements of high speed automatic testing. Actual values at operating temperature will exceed the
value at Ts = 25'C. When supply vottagtss are t 15V. no-load operating junction temperature may rise 40-tW'C above ambient, and more under load conditions.
Accordingly, VOS may change one to several mV, and IE will change signimantly during warm-up. Refer to 13 vs. temperature graph for expected values.
Note 3: LH40336 is sample tested only. Limits are not used to calculate outgoing quality levels. Avos/AT is the average value calculated from measurements at
25°C and Tmax.
Note 4: Measured in still air 7 minutes after application of Power. Guaranteed through correlated automatic pulse testing.
Not: s.. Guaranteed through automatic pulse testing at Tu = 25°C.
Note 6: Not 100% production tested; verlfied by sample testing only, Limits are not used to calculate outgoing quality level.
089017141] OESOVH'I
LH40330/ LH4063C
DC Electrical Characteristics vs = i15V. TM... 3 TA 3 TMAX unless otherwise specified (Note 1)
Limits
Parameter Conditions LH40630 Units
Min Typ Max
Output OffsetVoltage Rs S 100 kn, To == 25'C 10 50 mV
RL = 1000 (Note 2) 100 mV
Average Temperature Coefficient Rs g 100 kn .
otOutput OffsetVoltage 300 PV/ C
Input Bias Current Tu = 25'C (Note 2) 10 30 nA
100 nA
Voltage Gain " = t10V, Rs = 100 kn,
RL = 1.0 kn 0.94 0.96 1.0 V/V
" = i10V. Rs = 100 kn,
RI. = 500.1, = 25' C 0.91 0.93 0.98 V/V
Input Capacitance Case Shoned to Output 8.0 pF
Output impedance VOUT == i10V, Rs s 100 kn 1.0 4.0 n
RL = tion
Output CurrentSwing VIN = k10V, Rs s 100 kn. 0.2 0.25 Amps
Output Voltage Swing Ri. = 50t1 i 10 i 13 V
Vs = 15.0V, Rt. = tion,
Tu = 25'C 5.09 7.0 Vp.p
Supply Current Tu = 25 C. Rt. = tVs = i15V 35 65 mA
(Note 3)
Vs = t 5.0V (Note 3) 50 mA
PowerConsumption TJ = 25'C, RL = no,
Vs = At5V 1.05 1.95 W
" = i5.0V 500 mW
AC Electrical Characteristics TJ = 25'C, vs = t15V, m = son (Note 4), Rs = 50tt
Limit:
Parameter Conditions LH40630 Unite
Mln Typ Max
Slew Rate RL = 1.0 kn, VIN = t10V 6000 V/ps
VIN == i1OV, Tg = 25''C 2000 2400 vms
Bandwidth " = 1.0 Vrms 200 MHz
Phase Non-Linearity BW = 1.0 to 20 MHz 2.0 Degrees
Rise Time AVIN = 0.5V 1.9 ns
Propagation Delay AVIN = 0.5V 2.1 ns
Harmonic Distortion <0.1 %
Nate 1: LH40630 is 100% production nested at 25% only. Specifications at temperature extremes are verified by sample testing, but these limits are not used to
calculate outgohg quality level.
Not. 2: Sptaeitieatitrn Is at 25‘C junction Iernperuture due to requirements of high speed automatic testing Actual vahes at operating temperature wHI exceed the
value at Ts = 25'C. When supply voltages are K15V, no-load operating Junction temperature may rlso 40-60'0 above ambient. and more under load conditions.
Accordingly. vos may change one to several mV, and la and Kas will change significantly during warm-up. Refer to la and los VI. temperature graph for expemed
values
Note 3: Guavanteed through correlmed automatic pulse testing at T., = 25%.
Not. 4: Not 100% production tested: tmri6trd by sample testing omy. Limits are not used to calculate outgoing qualhy level.
Typical Performance Characteristics
LH4033C Power Dlttaipation LHaossc Power Dissipation
CASE (ax=15°cm
4 mum (ou=40°c/W)
POWER USSIPATION (W)
pom msswmou (W)
0255075100125150 o2s50N1tDu5t$o
muramun: te) TEMPERATURE Pc)
Lmoasc Supply Currant "
Supply Voltage
Lmosac Supply Current
" Supply Voltage
li. ct 50 rc=4a5°c
I I Tc=925°c
F 'r-"ee 5
tl T¢=025°C f "
rc=-25°c
5 10 15 20 5 10 15 20
sumv vomca (m SUPPLY vome: (tv)
LH40630 Output Voltage " LH40330 Negative Pulse
tt Supply Voltage Response
RL=500 A i's'ctia
A Rs=1kn a RL=1kn
t, E = t25T g Te = +25°c
g E mm
' E OUTPUT
s 1o 15 20 q 10 20 30 40 50 60
SUPPLY VOLTAGE (tv) nu: (ns)
LH4033c Frequency LH4033C Rise and Fall
Response Time " Temperature
Vs=:15V y =215v
2:221. 35 A Ti :32?
"ii' v;=1.OVmu 30 Ill C,'' tk0 L
E 10 " 25 g g
a M 20 - a 4.0
' M 15 g i
it tu 10 L g ao
10 20 M 100 200 50 100 -50 0 50 100 150
razouzucr Mir) mpmmz (el
LH4063C DC Safe
Operating Area
V5 =t15Y
Tc=25°c
OUTPUT CURRENT (ma)
-15 -10 -5 0 5 IO 15
00TNT vomce: (v)
LH4033C Output Voltage
" Supply Voltage
IL 3 1 kn
A n =1001m.
3; 1: = 025°C
5 10 15 20
SUPPLY vomcz (tv)
LH4033C Posltlve Pulse
Response
115-: 1:10 R son
'ie? 'Ni'iik s
0 IO 20 30 40 50 60
TIME (ns)
LH40630 Large Signal
Pulse Response
NLUIGON
VS =215V
Io: 25°C
OUTPUT VOLTAGE (2 V)
RL=lkn '
01234587891t)1112
TIME(ns)
TL/KM0008-0
OSQOVH'I/OSSOVH'I
Typical Performance Characteristics (Continued)
LH4033C/LH4063C
LH403ac Input Blas Current LH40630 Input Current
" Temperature vs Temperature LH4063C Frequency Response
tth 220
_ "d 180 A
g. 'g vs=g1ov 2 160 tl
t t lk a m s
g E g IN td.
2 V5=115V 3 100 ,
m g 100 ' 80 g
E ''i, i! © ..
a a 40
0 25 50 " id) 125 0 23 50 75 IN lb 000
Impmmnt (N) mAPm'URE Ce) nmumcv (mix)
LH4033C Normalized Input Blas LH4063C Small Signal LH4033C Input Bias Current
Current During Warm-Up Rise Time " Input Voltage
CY 00 am , , 10
J, v = 15v te=25'tt -
E tcr.S'l AX) NNT ’5 v agisv
'a 50° ' f v P z m (T =2s°c)
' E E $00 wt? n/ E M
E , 10 g 400 I m" B
B .9 It 300 I ":WL .2. M
Q 200 / m m ' t '
, 100 320 Rt Mtl 3
a 2 A 6 l It) 0 1 2 3 t 5 6 1 8 10 8 6 t 2 0 -2-4-6-8-1O
nu: mu rowtn ‘I'URN-ON (umurzs) TNE (M) MPUT VOLTAGE (v)
TL/K/10008-4
Application Hints
Recommended Layout Precautions: RF/video printed cir- , ' MN
cuit board layout rules should be followed when using the
LH4033C and LH4063C since they will provide power gain INPUT CD
to frequencies over 100 MHz. Ground planes are recom- OFFSET
mended and power supplies should be decoupled at each FRESH T. ° OUTPUT
device with low inductance capacitors. (OPEN)
Offset Voltage Adjustment: Both the LH4033C's and OFFSET
LH4063C's offset voltages have been actively trimmed by ADJUST
laser to meet guaranteed specifications when the offset pre- 2000
set pin is shorted to the offset adjust pin. This pre-calibre i':
tion allows the devices to be used in most DC or AC epplica- . T. - CN
tions without individually offset nuiling each device. If offset TL/K/10008-5
null is desirable, it is simply obtained by leaving the offset
preset pin open and connecting a trim pot of 200ft for the
LH40330 or 1 kn tor the LH4063C between the offset ad-
just pln and v- as illustrated in Figures 1 and 2.
FIGURE 1. Offttet Zero Adjust for LH4033C
C.' - 15V
TLfKM0008-6
FIGURE 2. Offset Zero Adjust for LH4063C
Application Hints (Continued)
Operation from Single or Asymmetrical Power Supplies;
Both device types may be readily used in applications where
symmetrical supplies are unavailable or not desirable. A typ-
ical application might be an interface to a MOS shift register
where v+ = + 5V and v- = -12V. In this case, an appar-
ent output offset occurs due to the device's voltage gain of
less than unity. This additional output offset error may be
predicted by:
(V+ --W-)
2 = 0.005 (V+ - V-)
Mo 2 (1 - Av)
where:
Av = No load voltage gain, typically 0.99
V+ = Positive supply voltage
v- = Negative suply voltage
For the above example, Avo would be -35 mV. This may
be adjusted to zero by offset voltage adjustment described
earlier. For AC coupled applications, no additional offset oc-
curs if the DC input is properly biased as illustrated in the
“typical applications" section.
Short Circuit Protection: In order to optimize transient re-
sponse and output swing, output current limit has been
omitted from the LH4033 and LH4063. Short circuit Protec-
tion may be added by inserting appropriate value resistors
between V+ and Vc+ pins and v- and Vc‘ pins as illus-
trated in Figures 3 and 4. Resistor values may be predicted
Flle 5 - = )..C,
lsc lsc
where:
lsc g 100 mA for LH4033C
lsc s 250 mA for LH40630
TL/K/10008-7
FIGURE 3. LH4033C Using Heslstor Current Llmltlng
The inclusion of limiting resistors in the collectors of the
output transistors reduces output voltage swing. Decoupling
Vc+ and Vc- pins with capacitors to ground will retain full
output swing for transient pulses. Alternate active current
limit techniques that retain full DC output swing are shown in
Figures tr, 6 and 7. In Figures 5 and 6, the current sources
are saturated during normal operation thus apply full supply
voltage to the VC pins. Under fault conditions, the voltage
decreases as required by the overload. For Figure tr:
VBE 0.6V
R = - = - = ton
UM lsc 60 mA
In Figure tr, quad transistor arrays are used to minimize part
count and:
VBE 0.6V
1/3 (lsc)
= ---- = 8.20
UM 1/3 (200 mA)
TL/K/10008-8
FIGURE 4. LH4063C Using Resistor Current Llmltlng
0 OUTPUT
tll = 02 = 2N2905
03 = 04 = 2N2219
[D '15V
TL/K/10008-9
FIGURE 5. LH4033C Current Llmltlng
Using Current Sources
OSQOVH'I/OSSOVH'I
LH4033C/LH4063C
Application Hints (Continued)
Ci-i-'-'?':'
fi-'Al-rpr)
INPUT T, 0 OUTPUT
- -15v
TL/K/tOOOB-IO
FIGURE 6. LH40630 Current leltlng
Using Current Source:
Capacitance Loading: Both the LH4033C and LH4063C
are designed to drive capacitive loads such as coaxial ca-
bles in excess of several thousand picotarads without sus-
ceptibility to oscillation. However. peak current resulting
from (CdV/dt) should be limited below absolute maximum
peak current ratings for the devices.
Thus for the LH4033C:
(-h-1s/i-N-) x CL 3 tom s 1250 mA
and for the LH4063C:
6%) X CL S IQUT S i500 mA
In addition, power dissipation resulting from driving capaci-
tive loads plus standby power should be kept below total
package power rating:
Pdiss 2 Pee ' PAC
2(V+ -V-)xls+PAty
PAC " (VP-P)2 y; f 8 h
Vp_p = Ptsak-to-poak output voltage swing
= Frequency
Ct = Load Capacitance
Operation Within an Op Amp Loop: Both devices may be
used as a current booster or isolation buffer within a closed
loop with op amps such as LH0032, LH0062, or LMI 18. An
isolation resistor of 47ft should be used between the op
amp output and the input of LH4033C. The wide bandwidths
and high slew rates of the LH4033C and LH40630 assure
that the loop has the characteristics of the op amp and that
additional rolloff is not required.
Hardware: In order to utilize the full drive capabilities of
both devices, each should be mounted with a heat sink par-
ticularly for extended temperature operation.
DESIGN PRECAUTION
Power supply bypassing is necessary to prevent oscillation
with both the LH40330 and LH40630 in all circuits. Low
inductance ceramic disc capacitors with the shortest practi-
cal lead lengths must be connected from each supply lead
(within plane. Capacitors should be one or two 0.1 pF in parallel for
the LH40330; adding a 4.7 HF solid tantalum capacitor will
help in troublesome instances. For the LH40630, two
0.1 p.F ceramic and one 4.7 yi' solid tantalum capacitors in
parallel will be necessary on each supply lead.
Schematic Diagrams
LH4033C
NORMALLY
SHORTED
T, OUTPUT
l NORMALLY
SHORTED
ADJUST -
NORMALLY
SHORTED
TL/K/10008-11
Schematic Diagrams (Continued)
LH4063C
-.---F-
NDRMALLY
" suomo
ttt el
n 21:, "
INPUT ol-u-
{a -T-O0imrut
04-1 4 yt"
" I I , \
tlt m ‘snomo
Typical Applications
High Speed Automatic Test Equipment
Forcing Function Generator
. -------..---- _
vetr, c I I
I d . I
Loon "I" I " I
I Amoco ''
. --. - - - - .
. --.- - - - - _
V c I I
m I I I
I L, n I
Loac "2" I , I , l
to I T"'" i
I AIIOOO ,'
o ADDMONAL mus
Ir REOURED
. ............ '
comm 2! '
comma) ' 1
WW 8 I I
TEST I
um tr'il,riD-iyo--i---
I DHOO34 I
. - - - a n I I - I
t E 1w
258 tW
TL/Kf10008-12
TL/K/tOMB-la
OSQOPH'I/OSEOVH'I
LH4033C/LH4063C
Typical Applications (Continued)
Nuclear Particle Detector
SHIELD
LARK AREA
SILICON th0tE
-0t15Y
ki-u-N-OMNI
Gamma Ray Pulse Integrator
1000tF-,
TL/KI10006-14
High Input Impedance Ac Coupled Amplifier
Isolation Buffer
OVERALL mm
TL/K/1DOOS-15
M > 100 MHz
TL/K/10008-t8
Coaxial Cable Driver
l REACTIVE
C LOAD
TL/K/10008-17 TL/K/tMOB-lit
Typical Applications (Continued)
Coaxial Cable Driver
‘Seiact c, For Optimum Pulse Response.
'iiy'tvHI-1'
TLfKMtXnB-19
1W CW Final Amplmer
o 630V
High Input Impedance Comparator
With Offset Adjust
Au. v.
m r GO
Single Supply Ac Amplimrr
vm=12.ov
th00t “r
ttmoto-l (-4
NO GO = LOGIC "1"
= LOGIC "ty'
TLfKt10008-21
TL/K/10006-23
"(0500.
TL/i0N008-20
Instrumentation ShleldlLlna Drlver
MNTO--
TL/KI10003-22
4.5 MHz Notch Filter
150 pf g, ',,
rr"- 2
non " "
h, LHwSSC t"
2200. 220.0.
TL/Kf10008-24
OSQOVH'l/OSSOVH‘I
LH4033C/LH4063C
Typical Appllcations (Continued)
LOGIC L
tNPUT H.
Ll:__;i.l
High Speed Sample lk Hold
1/2 onoou
‘Polycarbonate or Ttttlon
TLIKI1000B-25
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Datasheets for electronic components.
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This file is the datasheet for the following electronic components:
LH4033CN - product/lh4033cn?HQS=T|-nu|I-null-dscataIog-df-pf-null-wwe
LH4063CT - product/lh4063ct?HQS=T|-nu|I-nulI-dscatalog-df-pf-nuII-wwe
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