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LH0086CDNSN/a2avai+/-18 V, digitally-programmable-gain amplifier


LH0086CD ,+/-18 V, digitally-programmable-gain amplifierElectrical Characteristics Vs-- cF15V, RL=10 kn, TMle TA 3 TMAX, Pin 10 connected to Pin 11, Pin 5 ..
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LH0086CD
+/-18 V, digitally-programmable-gain amplifier
National
t Semiconductor
LH0086/LH0086C
Digitally-Programmable-Gain Amplifier
General Description
The LH0086 is a self-contained, high-accuracy, digitally-pro-
grammable-gain amplifier. It consists of a FET-input opera-
tional amplifier, a precision resistor ladder, and a digitally-
programmable switch network. A three-bit TTL-compatible
digital input selects accurate gain settings of 1, 2, 5, IO, 20,
50, 100, or 200.
The LH0086 exhibits low offset voltage, high input imped-
ance, fast settling, high power supply rejection ratio, and
excellent gain accuracy and gain non-Iinearity.
The LH0086 is specified for operation from -55"C to
+ 125°C. The LH0086C is specified from -25oC to + 85°C.
Both devices are hermetically sealed in a 14-Iead duaI-in-
line metal package.
Features
I: 0.01% maximum gain accuracy at gain=1
I: 0.005% typical gain non-linearity
l: 1 ppm/''C typical gain drift
II 10100 input impedance
ll 80 dB minimum PSRR.
u TTL-compatible digital inputs
I: 2 gs settling to 0.01%
Applications
I: Data acquisition systems
1: Auto range DVMs
u Adaptive servo loops
Simplified Schematic and Connection Diagrams
mp o----- o
10 (mjitbtr-'1
Vm- e - l
------o ttm _-J
run. (szuss)
Dual-ln-Line Package
2% m o'--.
ttttV-
thL o , l
menu cup -.L, ‘L "
n, _2 d.'..., "
win? In 12 smuALsun
no mnucx
Vaut (mm M-
muninnct) - - omnm
“no OFFSET AM
Top Vlcw
CASE l3 ELEI'JIICALLV ISOLATED
Order Number LH0086D or LH0086CD
See NS Package Number D14F
TL/K/5657-1
09800H'l/9800H1
LH0086/LH008BC
Absolute Maximum Ratings
If Milltary/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and spetMttatlons.
(Note 5)
TA Operating Temperature Range:
LH0086
LH0086C
TSTG Storage Temperature
- 55°C to +125''C
- 25°C to + 85°C
- 65''C to + 150°C
Vs Supply Voltage (Note 1) i 18V
VIN Analog Input Voltage (Note 2) t15V Lead Temperature
VMH, Digital Input Voltage - 4V, + Vs . (Soldering, 10 s.sconds) + 300°C
PD Power Dissipation 500 mW ESD rating to be determined.
Output Short Circuit Duration Continuous
DC Electrical Characteristics
VS= i15V, BL: 10 kn, TMINS TA s: TMAX, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-inverting)
Symbol Parameter Conditions LH0086 LH00860 Units
Min Typ Max Min Typ Max
vos Input Offset Voltage LTJ = 25°C 0.3 5.0 0.3 10 mV
7.0 13
Vos/ AT Input Offset Voltage VIN = 0V 10 10 p.V/°C
Change with Temperature
I3 Input Bias Current (Notes 3, 4) l T J = 25°C 100 500 100 500 pA
500 100 nA
HIN Input Resistance 10 10 Gn
VIN Input Voltage Flange i 10 d: 11.5 i 10 :11.5 V
Av Voltage Gain 1.0 1.0
2.0 2.0
See Table 1 5.0 5.0
for Digital Gain- 10 10 V/V
Control Codes 20 20
100 100
200 200
Gain Error AV: 1 0.003 0.01 0.003 0.03
2:23:20 W290 3:32 ‘iff lf? "li,
AV: 50,100,200 0.1 0.3 0.15 0.4 o/o
AV = 1 0.003 0.02 0.003 0.06
AV = 2,5 0.03 0.1 0.05 0.2
AV= 10,20 0.1 0.2 0.1 0.3
AV=50,100,200 0.15 0.4 0.15 0.5
Gain Non-Linearity AV = 1 TA = 25°C 0.002 0.002 %
0.005 0.005
AAV/AT Gain Temperature CoMfitrient AV: 1 1.0 1.0 ppm/°C
PSRR Power Supply Rejection Ratio , 8V SVS s , 18V 80 90 70 90 dB
V0 Output Voltage Swing RLtt 10 kn i 10 i 12 i 10 d: 12 V
Note 1: Improper supply power-on sequence may damage the device. See Power Supply Connection Section under Applications Information.
Note 2: for supply voltages less than t15V the maximum input voltage is equal to the supply voltage.
Note 3: Due to short production test time. these parameters are sptscifmti at junction temperature. Tv---- 25''C. In normal operation the iunction temperature rises
above the ambienl temperature. TA, as a result of the internal power dissipation, PD. T j=TA+ BJAKPD where 9M is the thermal resistance from junction to
ambient (typically 65°CIW).
Note 4: The input bias currents are junction leakage currents which approximately double for every 10°C increase in junction temperature.
Note 5: Refer to RETS0086Dfor LH00860 military specifications.
DC Electrical Characteristics (Continued)
Vs-- 1r 15V, BL: 10 kn, TMINS TA g TMAX, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-inverting).
Symbol Parameter Conditions LH0086 LH0086C Unlts
Mln Typ Max Mln Typ Max
'50 Output Short-Circuit Current TA-- 25''C t 5 l 18 i 40 l 5 d: 18 i 40 m A
i 2 * 40 i 2 * 40
Ro Output Resistance AVCL= 1 0.05 0.05 n
" Digital "0" Input Voltage 0.7 0.7 V
VIH Digital "I " Input Voltage 2.0 2.0
IIL Digital "o" Input Current VIN = 0.4V 1.5 4.0 1.5 4.0 HA
IIH Digital "W Input Current VIN = 2.4V 0.01 0.01
Vs Supply Voltage Range i 8.0 i 18 * 8.0 i 18 V
IS”) Positive Supply Current Vs = : 18V 8.5 15.5 8.5 15.5 m A
ls( -) Negative Supply Current - 4.5 - 8.5 - 4.5 - 8.5
AC Electrical Characteristics
Vs = i15V. TA-- 25''C, RL---' 10 kn, Pin 10 connected to Pin 11, Pin 5 connected to Pin 6 (Non-lnverting)
Symbol Parameter Condltlons Min Typ Max Unlts
BW Small Signal Bandwidth AV= 1 3000
- 3 dB Av-- 50 60
AV: 200 15 kHz
AV = 1 425
- 1% AV = 50 8.5
AV = 200 2
PBW Power Bandwidth Vo--- i 1 ov 159 kHz
SR Slew Rate 10 V/ps
Av = 1 2.5
ts Settling Time (Figure 7) 0.01 % AVO = 20V Av--- 50 20 ps
AV = 200 75 us
ts Settling Time After Gain 10
Change
5N 1E/lutigl7g'r'h'f'i" Rs = 1 Mn BW = 0.1 -1 0 Hz 3 "I
AV: 100 f--I kHz 25 nV/1/Hz
TN Equivalent Input Noise Current 0.01 pA/ 1/ FE
09800H'l/9800H‘I
LH0086/LH00860
120 Power Su Re
mm (as)
10 mo " IN 1m
rnmuzucv (mp
Settling Time
SETI'LINE TIME 06)
V3.21“
Avo-zznv
“5-509
18st080s0ttl0200
tum (WV)
INPUT NURSE 11V)
sumy comma (gm)
Rs = 500. Bandwidth = 0.1 Hzto 10 Hz
1 WV/division Vertical, 5 seconds/division Horizontal
' 10 " m
SUPPLY VOLTAGE Ite)
" Supply Current
ra l -551:
SUPPLY VOLTAGE It81
Wldeband Nolse
OUTPUT RESISTANCE (Q)
EQUIVALENT INPUT NOISE VOlJ'ABE (IIV/ H!)
Closed Loop Output
Rettitttantte
1 2 ' IO N tio
Equivalent Input Noise
so Voltage
" leo " 10k
FREOUD‘BV (Hz)
TL/ kt 5657-3
TL/K/5657-2
TL/K/6657-4
Rs = 50ft. Bandwidth = 10 Hz to 10 kHz
5 WV/division Vertical, 1 ms/division Horizontal
Applications Information
Theory of Operation
The LH0086 is a digitally programmable gain amplifier with
3-bit digital gain control. It contains a FET-input operational
amplifier, a precision resistor ladder, and a digitally program-
mable switch network.
The LH0086 was designed for use in a non-inverting config-
uration, thus the following discussion covers the LH0086 as
used as a non-inverting amplifier. The gain of the LH0086 is
given by the familiar gain equation of a non-inverting ampliMr.
Av 1 + Rs
Each gain step is set by the ratio of the ladder resistors. The
resistor ladder is constructed with high stability, low temper-
ature-txmfficient resistors precision laser-trimmed to the re-
quired values. FET switches are used to select the desired
ratio. Since the FET switches are in series with the opera-
tional amplifier input, their "on resistance" and temperature
drift do not degrade amplifier accuracy. The FET switches
are selected by a 1 of 8 decoder, by applying the proper
logic levels at digital inputs DO, DI, and D2. The gains are
set as given in Table l.
TABLE I. Gain-Control Codes
Gain D2 01 DO
1 0 0 0
2 O 0 1
10 0 1 1
20 1 0 0
50 1 0 1
100 1 1 O
200 1 1 1
Power Supply Connection
Proper power supply connections are shown in Figure 1.
The power supplies should be bypassed to ground as close
as possible to device supply pins. For most applications, the
bypass capacitor should be 0.1 pF.
SIKBLE NIH mm L
'GEHMANIUM OR SCHOTTKY
FIGURE l. Power Supply and Ground Connections
Care must be taken in the power-on sequence. The LH0086
may suffer irreversible damage it the V+ supply is applied
prior to the powering on of the V- supply. In most applica-
tions using dual-tracking supplies and with the device supply
pins adequately bypassed, this will not present a problem. If
this cannot be guaranteed, a germanium or Schottky protec-
tion diode should be connected between the digital ground
pin and the v- pin as shown in Figure t.
Grounding Considerations
Care should be taken in the connection of digital and analog
grounds. Digital switching currents can introduce noise on
the analog ground pin. If possible, both grounds should go
to a ground plane beneath the device, otherwise each
ground should be run separately to a single point ground.
The idea is to keep digital current from passing through the
analog ground line. it long ground leads are used, diode
clamps should be placed as close to the device as possible
(Figure f).
Programmable Attenuator
The LH0086 may be used as a programmable attenuator
when connected as in Figure P. The accuracy of this attenu-
ator will be typically 0.1%.
Note: Max. VIN: i 11 Volts.
m Iss, utoou
7 s,,-"''"
nu e',s...,
TL/ Kf5657-5
FIGURE 2. Programmable Attenuator
09800H'l/9800H'l
LHOOBG/LHOOBGC
Applications Information (Continued)
TABLE II. Attenuator Codes
D2 D1 Do Attenuation TABLE 111. Inverting Galn Chart
0 o 0 1 D2 Dt DO Gain Rm (it)
0 O 1 0 0 0 Av = 0 30k
0 1 o o o 1 AV=1 15k
0 1 1 IO 0 1 0 Av=4 6k
0 1 1 Av = 9 3k
1 0 o 20 1 o o Av= 19 1.5k
1 0 1 50 1 0 1 AV = 49 600
1 1 o 100 1 1 0 AV = 99 300
1 1 1 AV: 199 150
1 1 1 200
. Remote Output Sense
Inverting Mode . . . The VOUT sense pin of the LH0086 should be connected at
The LH0086 may be _Used In _ myemng mode, however, the load in order to eliminate errors due to lead resistance.
there are several desngn txmsiderations. In any case the output sense and output force must be tied
I. Input resistance is low at high gains (see gain chart for together at some point. See Figure 4.
input resistance at each gain).
2. Each gain step gets a one subtracted from the non-invert-
ing gain. (See inverting gain chart for available gains.)
3. The first gain step (digital code of 000) cannot be used
because the output will remain at virtual ground regard-
less of the input.
" s,,,.---" FIGURE 4. Remote Output Sense FIGURE 5. Offset Adjustment
It ' moons
1 + rum umt
" - um-Tzcu
5” - n ' a _ 2131
a - . [ e
m - F A 2 ' I 03mm»:
lt" " ' 0.1": To 11m: 1:11 151:
t " A AVE IN mm on Eauw.
- 7 1m
FIGURE 6. Noise Measurement Clrcult
tW 3m lss2"
.4 ton
OUTPUT EIHDI " SCOPE INPUT
m------- -
FIGURE 3. LHOOBB Inverting Gain Configuration
VERY FAST
SETTUNG AMP
= TL/K/5657-6
FIGURE 7. Settling Time Test Clrcult
Definition of Terms
Offset Voltage: The voltage that must be ap-
plied to tome the output to 0 volts.
Input Bias Current: The current into Pin 7 with
the device connected in the non-inverting config-
uration.
Input Resistance: The ratio of the change in in-
put voltage to the change in input current on ei-
ther input with the other grounded.
Input Voltage Range: The voltage range for
which the device is operational.
Power Supply Rejection Ratio: The ratio of the
specified change in supply voltage to the change
in input offset voltage over this range.
Voltage Gain: The ratio of output voltage change
to the input voltage change producing it.
Gain Error: The deviation in percent between the
ideal voltage gain and the value obtained when
the device is configured for that gain.
Gain Non-Linearity: The deviation ot the gain
from a straight line drawn through the end-points
expressed as a percent of full scale (10V for op-
eration with fc15V supplies). For testing pur-
poses it is the difference between positive swing
gain (0V to 10V) and average gain (- 10V to 10V)
or between negative swing gain (0V to -10V)
and average gain.
Output Voltage Swing: The peak output voltage
swing referenced to ground into specified load.
Output Short-Circuit Current: The current sup-
plied by the device with the output connected di-
rectly to ground.
Closed Loop Output Resistance: The ratio of
change in output voltage to change to output cur-
rent at a specific gain.
Supply Voltage Range: The supply voltage
range for which the device is operational.
Supply Current: The current required from the
supply to operate the device with no load and
with the analog as well as the digital inputs at 0V.
Power Dissipation: The power dissipated in the
device with no load and with the analog as well
as the digital inputs at 0V.
Digital "I" Input Voltage: Minimum voltage re-
quired at the digital input to guarantee a high log-
ic state.
Digital "O" Input Voltage: The current into a dig-
ital input at specified logic level.
Avos/AT Average Input Onset Voltage Drltt: The ratio
AAv/AT
of input offset voltage change from 25''C to either
temperature extreme divided by the temperature
range.
Average Gain Temperature Coefficient: The
ratio in gain from 25'C to either temperature ex-
treme divided by the temperature range.
Bandwidth: The frequency at which the voltage
gain is reduced to 3 dB below the low frequency
value.
Power Bandwidth: Maximum frequency for
which the output swing is a large signal sine-
wave without noticeable distortion.
Slew Rate: The internally limited rate of change
in output voltage with a large amplitude step
function applied at the input.
Settling Time: The time between the initiation of
an input step function and the time when the out-
put voltage has settled to within a specified error
band of the final output voltage.
Gain Switching Time: The time between the ini-
tiation of a gain logic change and the time when
the final gain switches are closed. It includes
Overdrive recovery time, but not settling to final
value.
Equivalent Input Noise Voltage: The rms or
peak noise voltage referred to the input (RTI)
over a specified frequency band.
Equivalent Input Noise Current: The rms or
peak noise current referred to the input (RTI)
over a specified frequency band.
09900H'I/9900H'l
This datasheet has been :
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