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LDS3985M32R-LDS3985M33R
ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR
1/13December 2004 INPUT VOLTAGE FROM 2.5V TO 6V STABLE WITH LOW ESR CERAMIC
CAPACITORS ULTRA LOW DROPOUT VOLTAGE (150mV
TYP. AT 300mA LOAD, 0.4mV TYP. AT 1mA
LOAD) VERY LOW QUIESCENT CURRENT (85µA
TYP. AT NO LOAD, 200µA TYP. AT 300mA
LOAD; MAX 1.5µA IN OFF MODE) GUARANTEED OUTPUT CURRENT UP TO
300mA WIDE RANGE OF OUTPUT VOLTAGE:
1.25V; 1.35; 1.5V; 1.8V; 2V; 2.1V; 2.2V; 2.5V;
2.6V; 2.7V; 2.8V; 2.85V; 2.9V; 3V; 3.1V; 3.2V;
3.3V; 4.7V FAST TURN-ON TIME: TYP. 240µs O =2.2µF, C BYP = 33nF AND IO =1mA] LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN INTERNAL CURRENT AND THERMAL LIMIT OUTPUT LOW NOISE VOLTAGE 30µV RMS OVER 10Hz to 100KHz S.V.R. OF 55dB AT 1KHz, 50dB AT 10KHz TEMPERATURE RANGE: -40°C TO 125°C
DESCRIPTIONThe LDS3985 provides up to 300mA, from 2.5V to
6V input voltage.
It is stable with ceramic and high quality tantalum
capacitor. The ultra low drop-voltage, low
quiescent current and low noise makes it suitable
for low power applications and in battery powered
systems. Regulator ground current increases only
slightly in dropout, further prolonging the battery
life. Shutdown Logic Control function is available,
this means that when the device is used as local
regulator, it is possible to put a part of the board in
standby, decreasing the total power consumption.
Typical applications are in mobile phone and
similar battery powered wireless systems,
portable information appliances.
LDS3985
SERIESULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG.
FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR
Figure 1: Schematic DiagramRev. 1
LDS3985 SERIES2/13
Table 1: Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms.
Table 2: Thermal Data
Table 3: Order Codes (*) Available on request.
LDS3985 SERIES3/13
Figure 2: Connection Diagram (top view for SOT, top through view for DFN6)
Table 4: Pin Description
Figure 3: Typical Application Circuit
LDS3985 SERIES4/13
Table 5: Electrical Characteristics For LDS3985 (Tj = 25°C, VI = V O(NOM) +0.5V, CI = 1μF, CO = 2.2μF BYP = 33nF, IO = 1mA, V INH = 1.4V, unless otherwise specified)
Note 1: For VO(NOM) < 2V VI = 2.5V
Note 2: For VO(NOM) =1.25V VI = 2.5V
Note 3: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specifi-
cation does not apply for input voltages below 2.5V.
Note 4: Turn -on time is time measured between the enable input just exceeding VINH High Value and the output voltage just reaching 95%
of its nominal value
Note 5: Typical thermal protection hysteresis is 20°C
LDS3985 SERIES5/13
TYPICAL PERFORMANCE CHARACTERISTICS (Tj = 25°C, VI = V O(NOM) +0.5V, CI = 1μF, CO = 2,2μF,
CBYP = 33nF, IO = 1mA, VINH = 1.4V, unless otherwise specified)
Figure 4: Output Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 6: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
Figure 8: Shutdown Voltage vs Temperature
Figure 9: Line Regulation vs Temperature
LDS3985 SERIES6/13
Figure 10: Line Regulation vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 12: Quiescent Current vs Temperature
Figure 13: Quiescent Current vs Temperature
Figure 14: Quiescent Current vs Temperature
Figure 15: Supply Voltage Rejection vsFrequency
LDS3985 SERIES7/13
Figure 16: Dropout Voltage vs Temperature
Figure 17: Dropout Voltage vs Output Current
Figure 18: Inhibit Transient
VI = 5V, IO = 1mA, VINH = 0 to 1.2V, CI = CO = 1μF (cer),
CBYP = 10nF, TR = TF = 1µs
