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LDR1833-LDR2533-PT
VERY LOW DROP DUAL VOLTAGE REGULATOR
1/13August 2004 OUTPUT CURRENT 1 UP TO 500mA OUTPUT CURRENT 2 UP TO 1.0A LOW DROPOUT VOLTAGE 1
(0.3V @ IO =500mA) LOW DROPOUT VOLTAGE 2
(0.4V @ IO =1A) VERY LOW SUPPLY CURRENT (TYP.50µA
IN OFF MODE, 1.6mA MAX IN ON MODE) LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN OUTPUT VOLTAGE AVAILABILITY FOR
EACH REGULATOR: 1.8V, 2.5V, 3.3V INTERNAL CURRENT AND THERMAL LIMIT STABLE WITH LOW VALUE (MIN 4.7µF)
AND LOW E.S.R. OUTPUT CAPACITORS SUPPLY VOLTAGE REJECTION: 70dB (TYP.) TEMPERATURE RANGE (-40°C TO 125°C)
DESCRIPTIONThe LDRxxyy is a Very Low Drop Dual Voltage
Regulator available in PPAK for the version
without inhibit and in SPAK-7L for the version with
the shutdown feature. The very low drop-voltage
(0.5V) and the very low supply current make it
particularly suitable for low noise and low power
applications such as PDA, MICRODRIVE and
other data storage applications while the used
high voltage technology makes this device
suitable for consumer applications such as
MONITORS AND SET-TOP-BOX. For each VO a
Shutdown Logic Control function is available (TTL
compatible) to decrease the total power
consumption.
LDRxxyyVERY LOW DROP
DUAL VOLTAGE REGULATOR
Figure 1: Block DiagramRev. 2
LDRxxyy2/13
Table 1: Absolute Maximum Ratings Absolute Maximum Rating are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Table 2: Thermal Data
Figure 2: Connection Diagram (top view)
Table 3: Pin Description
Table 4: Order Codes
LDRxxyy3/13
Table 5: Electrical Characteristics (VI1 = VO1 +2V, VI2 = VO2 +2V, V INH1 = V INH2 = 2.5V, I1,2 = 2.2μF, C O1,2 = 4.7μF, IO1 = IO2 = 10mA, TA = -40°C to 125°C, unless otherwise specified. Typical
values are referred at TA = 25°C)
(1): This test is not performed for VO<2.5V.
(2): Guaranteed by design, but not tested in production.
Figure 3: Typical Application Circuit
LDRxxyy4/13
TYPICAL CHARACTERISTICS (unless otherwise specified Tj = 25°C)
Figure 4: Dropout Voltage (VO1 ) vs Temperature
Figure 5: Dropout Voltage (VO2 ) vs Temperature
Figure 6: Output Voltage (VO1 ) vs Temperature
Figure 7: Output Voltage (VO2 ) vs Temperature
Figure 8: Line Regulation (VO1 ) vs Temperature
Figure 9: Load Regulation (VO1 ) vs Temperature
LDRxxyy5/13
Figure 10: Line Regulation (VO2 ) vs Temperature
Figure 11: Load Regulation (VO2 ) vs
Temperature
Figure 12: Short Circuit Current (VO1 ) vs Drop
Voltage
Figure 13: Short Circuit Current (VO2 ) vs Drop
Voltage
Figure 14: Inhibit Voltage vs Temperature
Figure 15: One Channel Inhibit Current vs Temperature
LDRxxyy6/13
Figure 16: Supply Voltage Rejection vs (VO1)
Temperature
Figure 17: Supply Voltage Rejection vs (VO2)
Temperature
Figure 18: Supply Voltage Rejection (VO1) vs Frequency
Figure 19: Supply Voltage Rejection (VO2 ) vs
Frequency
Figure 20: Maximum Total Quiescent Current vs Temperature
Figure 21: Total Supply Current vs Temperature
LDRxxyy7/13
Figure 22: Quiescent Current (VO1 ) vs Output
Current
Figure 23: Quiescent Current (VO2 ) vs Output
Current
Figure 24: Thermal Protection vs VO1
Figure 25: Load Transient
Figure 26: Line Transient V O1,2
Figure 27: Start up Transient VO1
CI1,2=1µF, C O1,2=2.2µF, V INH1,2=2.5V, VI1=4.5V, VI2=5.3V,
IO1=5mA to 0.5A, IO2=5mA to 1A, tRISE=tFALL=4.2µs
CI1,2=0, CO1,2=2.2µF, V I1=4.4 to 10.4V, VI2=5.3 to 11.3V,
IO1=0.25A, IO2=0.5A, tRISE=tFALL=4.4µs
VI1=1.1 to 8.5V, VI2=1.2 to 9.8V, IO1=0.25A, IO2=0.5A, tRISE=5µs
