LD49300PT12R ,3A Very low drop for low output voltage regulatorElectrical characteristics . . . . . 87 Typical characteristics . . . . . . . 98 Applicat ..
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LD49300PT08R-LD49300PT12R
3A Very low drop for low output voltage regulator
May 2014 DocID12861 Rev 4 1/23
LD493003 A very low-dropout voltage regulator
Datasheet - production data
Features Input voltage range:
–VI = 1.4 V to 5.5 V BIAS = 3 V to 6 V Stable with ceramic capacitors ±1.5% initial tolerance Maximum dropout voltage (VI - VO ) 400 mV
over the operating temperature range Adjustable output voltage starting from 0.8 V Very fast transient response (up to 10 MHz
bandwidth) Excellent line and load regulation
specifications Logic-controlled shutdown option Thermal shutdown and current limit protection Junction temperature range: - 25 °C to 125 °C
Applications Graphics processors PC add-in cards Microprocessor core voltage supply Low voltage digital ICs High efficiency linear power supplies SMPS post regulators
DescriptionThe LD49300 is a high-bandwidth, low-dropout,
3.0 A voltage regulator, ideal for powering core
voltages of low power microprocessors. The
LD49300 implements a dual supply configuration,
which guarantees a very low output impedance
and a fast transient response. The LD49300
requires a bias input supply and a main input
supply, allowing ultra-low input voltages on the
main supply rail. The input supply operates from
1.4 V to 5.5 V and bias supply requires between 3
V and 6 V to work properly. The LD49300 offers
fixed output voltages from 0.8 V to 1.8 V and
adjustable output voltages from 0.8 V. The
LD49300 requires a minimum output capacitance
for stability, and works optimally with small
ceramic capacitors.
Table 1. Device summary Adjustable version.
Contents LD493002/23 DocID12861 Rev 4
Contents Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138.1 Input supply voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.2 Bias supply voltage (VBIAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.3 External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.4 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.5 Minimum load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8.6 Power sequencing recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.7 Power dissipation/heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.8 PPAK package heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.9 Adjustable regulator design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.10 Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DocID12861 Rev 4 3/23
LD49300 Typical application circuits Typical application circuits
Figure 1. Adjustable version
Figure 2. Fixed version with enable
Alternative application circuits LD49300
4/23 DocID12861 Rev 4 Alternative application circuits
Figure 3. Single supply voltage solution
Figure 4. LD49300 and DC-DC pre-regulator to reduce power dissipation
DocID12861 Rev 4 5/23
LD49300 Pin configuration
3 Pin configuration
Figure 5. Pin connection (top view)
Table 2. Pin description
Diagram LD49300
6/23 DocID12861 Rev 4
4 Diagram
Figure 6. Block diagram
DocID12861 Rev 4 7/23
LD49300 Maximum ratings
5 Maximum ratings
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
All values are referred to ground.
Table 3. Absolute maximum ratings
Table 4. Operating ratings
Electrical characteristics LD49300
8/23 DocID12861 Rev 4
6 Electrical characteristics
TJ = - 25 °C to 125 °C; VBIAS = VO + 2.1 V(1) ; VI = VO + 1 V; VEN = VBIAS(2) ; IO = 10 mA; =1 µF; CO = 10 µF; CBIAS = 1 µF; unless otherwise specified. Typical values are referred
to TJ = 25 °C.
Table 5. Electrical characteristics For VO ≤ 1 V, VBIAS dropout specification is not applied due to 3 V minimum VBIAS input. Fixed output voltage version only.
DocID12861 Rev 4 9/23
LD49300 Typical characteristics
7 Typical characteristics
Figure 7. Reference voltage vs. temperature Figure 8. Output voltage vs. temperature
Figure 9. Load regulation vs. temperature Figure 10. Line regulation vs. temperature
Figure 11. Output voltage vs. input voltage Figure 12. Dropout voltage (VIN-V OUT ) vs.
temperature (I OUT = 1.5 A)
Typical characteristics LD49300
10/23 DocID12861 Rev 4
Figure 13. Dropout voltage (VIN-VOUT) vs.
temperature (IOUT = 3 A)
Figure 14. VBIAS pin current vs. temperature
Figure 15. Noise vs. frequency Figure 16. Quiescent current vs. temperature
Figure 17. Supply voltage rejection vs. output
current
Figure 18. Stable region vs. C OUT and high ESR
DocID12861 Rev 4 11/23
LD49300 Typical characteristics
Figure 19. Stable region vs. COUT and low ESR Figure 20. VBIAS and VIN start-up transient
response (VIN and VBIAS startup at the same
time)
Figure 21. VIN start-up transient response BIAS startup before than VIN) Trise = 300 μs
Figure 22. VIN start-up transient response BIAS startup before than VIN) Trise = 30 μs
Typical characteristics LD49300
12/23 DocID12861 Rev 4
Figure 23. VIN start-up transient response
(VBIAS startup before than VIN and VEN = VIN)
Figure 24. Load transient response
