L9333MD ,QUAD LOW SIDE DRIVERL9333QUAD LOW SIDE DRIVER■ WIDE OPERATING SUPPLY VOLTAGE MULTIPOWER BCD TECHNOLOGYRANGE FROM 4.5V U ..
L9333MD-TR ,QUAD LOW SIDE DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply voltage DC -0.3 to 32 VSSupply voltage ..
L9337MD ,TRIPLE LOW SIDE DRIVERABSOLUTE MAXIMUM RATINGS (no damage or latch)Symbol Parameter Value UnitV Supply voltage -24 to 45 ..
L9337MD ,TRIPLE LOW SIDE DRIVERELECTRICAL CHARACTERISTICS (Refer to the test circuit, unless otherwise specified.)Symbol Parameter ..
L9338D ,QUAD LOW SIDE DRIVERBLOCK DIAGRAMIN4 CHANNEL 4 OUT4OUT1IN1= &THERMALSHUTDOWNCHANNEL 14 DIAGPRG DIAGNOSTICLOGICENVintREF ..
L9338D ,QUAD LOW SIDE DRIVERELECTRICAL CHARACTERISTICS (Continued)Symbol Parameter Test conditions Min. Typ. Max. UnitTiming (s ..
LC7368J ,Switchable DTMF/Pulse DialerBLOCK DIAGRAM1mDilF--- upil WrittrWgio Reaithgis 'i'"FaiFi_'srjz:cifl1aiiTt1 iHiii;vss IF---I Im Ch ..
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LC73711N ,Switchable DTMF/Pulse Dialer with MemoryBLOCK DIAGRAMVDD VSSm ir---::]-W-Hr- 16x4xeo IEl RAM ti) Jog Ha ICtr l MUTE1M 1"AT I 1 c) bit ~45m ..
LC73750 ,Serial I/O Dialler with Keyboard Input FunctionsFeatures. Uses CMOS technology capable of directly operating onthe telephone line.. Permits the use ..
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LC7385 ,DTMF ReceiverPin Assignment16 15 14 13 12 11 1018 17912 3 45 67 8Pin FunctionsPe in No. NO amIn / Descriptio+1N ..
L9333MD
QUAD LOW SIDE DRIVER
1/13
L9333March 2001 WIDE OPERATING SUPPLY VOLTAGE
RANGE FROM 4.5V UP TO 32V FOR
TRANSIENT 45V VERY LOW STANDBY QUIESCENT
CURRENT TYPICALLY < 2μA INPUT TO OUTPUT SIGNAL TRANSFER
FUNCTION PROGRAMMABLE HIGH SIGNAL RANGE FROM -14V UP TO 45V
FOR ALL INPUTS 3.3V CMOS COMPATIBLE INPUTS DEFINED OUTPUT OFF STATE FOR OPEN
INPUTS FOUR OPEN DRAIN DMOS OUTPUTS, WITH
RDSon = 1.5Ω FOR VS > 6V AT 25°C OUTPUT CURRENT LIMITATION CONTROLLED OUTPUT SLOPE FOR LOW EMI OVERTEMPERATURE PROTECTION FOR
EACH CHANNEL INTEGRATED OUTPUT CLAMPING FOR FAST
INDUCTIVE RECIRCULATION VFB > 45V STATUS MONITORING FOR
- OVERTEMPERATURE
- DISCONNECTED GROUND OR SUPPLY
VOLTAGE
DESCRIPTIONThe L9333 is a monolithic integrated quad low side
driver. It is intended to drive lines, lamps or relais in
automotive or industrial applications.
QUAD LOW SIDE DRIVER
BLOCK DIAGRAM
L9333 2/13
PIN CONNECTION (Top view)
PIN FUNCTION
3/13
L9333
ABSOLUTE MAXIMUM RATINGSNote 1) : In flyback phase the output voltage can reach 60V.
ESD - PROTECTIONNote: Human-Body-Model according to MIL 883C. The device widthstand ST1 class level.
THERMAL DATANote 2) : With 6cm2 on board heat sink area.
LIFE TIME
L9333 4/13
OPERATING RANGE:Within the operating range the IC operates as described in the circuit description, including the diagnostic table.
ELECTRICAL CHARACTERISTCSThe electrical characteristics are valid within the defined Operating Conditions, unless otherwise specified.
The function is guaranteed by design until TJSDon switch-on-threshold.
Note 3) : Current direction depends on the programming setting (PRG=high leads into a positive current see also Blockdiagram page 1)
5/13
L9333Note : All parameters are measured at 125°C.
Note 4) : See also Fig.3 Timing Characteristics
ELECTRICAL CHARACTERISTCS (continued)
L9333 6/13
Figure 1. Timing CharacteristicsNote 5) : Output voltage slope not controlled for enable low!
7/13
L9333
FUNCTIONAL DESCRIPTIONThe L9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications.
The logic input levels are 3.3V CMOS compatible. This allows the device to be driven directly by a microcon-
troller. For the noise immunity, all input thresholds have a hysteresis of typ. 100mV. Each input (IN, EN and
PRG) is protected to withstand voltages from -14V to 45V. The device is activated with a 'high' signal on ENable.
ENable 'low' switches the device into the sleep mode. In this mode the quiescent current is typically less than
2μA. A high signal on PRoGramming input changes the signal transfer polarity from noninverting to the inverting
mode. This pin can be connected either to VS or GND. If these pins are not connected, the forced status of the
PRG and EN pin is low. For packaged applications it is still recommended to connect all input pins to ground
respective VS to avoid EMC influence. The forced condition leads to a mode change if the PRG pin was high
before the interruption. Independent of the PRoGramming input, the OUTput switches off, if the signal INput pin
is not connected. This function is verified using a leakage current of 5μA (sink for PRG=high; source for
PRG=low) during circuit test.
Each output driver has a current limitation of min 0.4A and an independent thermal shut-down. The thermal
shut-down deactivates that output, which exceeds temperature switch off level. When the junction temperature
decreases 20K below this temperature threshold the output will be activated again. This 20K is the hysteresis
of the thermal shutdown function. The Gates, of the output DMOS transistors are charged and discharged with
a current source. Therefore the output slope is limited. This reduces the electromagnetic radiation. For induc-
tive loads an output voltage clamp of typically 52V is implemented.
The DIAGnostic is an open drain output. The logic status depends on the PRoGramming pin. If the PRG pin is
'low' the DIAG output becomes low, if the device works correctly. At thermal shut-down of one channel or if the
ground is disconnected the DIAGnostic output becomes high. If the PRG pin is 'high' this output is switched off
at normal function and switched on at overtemperature. For the fault condition of interrupted ground, the poten-
tial of VS and Diagnostic should be equal.
DIAGNOSTIC TABLEX = not relevant
* selective for each channel at overtemperature
