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L6759D
3+1 dual controller for VR12 with PMBus
May 2012 Doc ID 023240 Rev 1 1/51
L6759D3+1 dual controller for VR12 with PMBus
Datasheet − production data
Features VR12 compliant with 25 MHz SVID bus Rev1.5 SerialVID with programmable IMAX,
TMAX, VBOOT, ADDRESS Second generation LTB Technology™ Flexible driver/DrMOS support JMode support Fully configurable through PMBus Dual controller: 3-phase for VDDQ 1-phase for VTT Single NTC design for TM, LL and Imon
thermal compensation VFDE and GDC - gate drive control for
efficiency optimization DPM - dynamic phase management Dual remote sense 0.5% output voltage accuracy Full-differential current sense across DCR AVP - adaptive voltage positioning Dual independent adjustable oscillator Dual current monitor Pre-biased output management Average and per-phase OC protection OV, UV and FB disconnection protection Dual VR_RDY VFQFPN48 6x6 mm package
Application DDR3 memory supply for VR12 servers
DescriptionThe L6759D is a dual controller designed to
power Intel’s VR12 processor memories: all
required parameters are programmable through
dedicated pin-strapping and PMBus interface.
The device features 3-phase programmable
operation for the multi-phase section and a single-
phase with independent control loops. Single-
phase (VTT) reference is always tracking multi-
phases (VDDQ) scaled by a factor of 2.
The L6759D supports power state transitions
featuring VFDE, programmable DPM and GDC
maintaining the best efficiency over all loading
conditions without compromising transient
response.
The device assures fast and independent
protection against load overcurrent,
under/overvoltage and feedback disconnections.
The device is available in a VFQFPN48 6x6 mm
package.
Table 1. Device summary
Contents L6759D
2/51 Doc ID 023240 Rev 1
Contents Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 5
1.1 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Device configuration and pin-strapping tables . . . . . . . . . . . . . . . . . . 17
4.1 JMode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Programming HiZ level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1 Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Output voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1 Multi-phase section - phase # programming . . . . . . . . . . . . . . . . . . . . . . 22
6.2 Multi-phase section - current reading and current sharing loop . . . . . . . . 22
6.3 Multi-phase section - defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.4 Multi-phase section - IMON information . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.5 Single-phase section - disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.6 Single-phase section - current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.7 Single-phase section - defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.8 Dynamic VID transition support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.9 DVID optimization: REF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Output voltage monitoring and protection . . . . . . . . . . . . . . . . . . . . . . 28
7.1 Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2 Overcurrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
L6759D Contents
Doc ID 023240 Rev 1 3/51
7.2.1 Multi-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2.2 Overcurrent and power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.2.3 Single-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Single NTC thermal monitor and compensation . . . . . . . . . . . . . . . . . 32
8.1 Thermal monitor and VR_HOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8.2 Thermal compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.3 TM and TCOMP design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Efficiency optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1 Dynamic phase management (DPM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.2 Variable frequency diode emulation (VFDE) . . . . . . . . . . . . . . . . . . . . . . 35
9.3 Gate drive control (GDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
10.1 LSLESS startup and pre-bias output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 System control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
11.1 Compensation network guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
11.2 LTB Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 PMBus support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
12.1 Enabling the device through PMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
12.2 Controlling Vout through PMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
12.3 Input voltage monitoring (READ_VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
12.4 Duty cycle monitoring (READ_DUTY) . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
12.5 Output voltage monitoring (READ_VOUT) . . . . . . . . . . . . . . . . . . . . . . . . 46
12.6 Output current monitoring (READ_IOUT) . . . . . . . . . . . . . . . . . . . . . . . . 46
12.7 Temperature monitoring (READ_TEMPERATURE) . . . . . . . . . . . . . . . . . 46
12.8 Overvoltage threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
List of Tables L6759D
4/51 Doc ID 023240 Rev 1
List of T ables
Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 6. Pin-strapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 7. PMBus address definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 8. L6759D protection at a glance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 9. Multi-phase section OC scaling and power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 10. Efficiency optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 11. Supported commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 12. OV threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 13. VFQFPN48 (6x6 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 14. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
L6759D List of figures
Doc ID 023240 Rev 1 5/51
List of figures
Figure 1. Typical 3-phase application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Typical 2-phase application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. JMode: voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 6. Device initialization: default . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 7. Device initialization: alternative sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8. Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9. Current reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 10. DVID optimization circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11. Thermal monitor connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 12. Output current vs. switching frequency in PSK mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 13. Efficiency performances with and without enhancements (DPM, GDC) . . . . . . . . . . . . . . 36
Figure 14. ROSC vs. FSW per phase (ROSC to GND - left; ROSC to 3.3V - right) . . . . . . . . . . . . . . . . 38
Figure 15. LSLESS startup: enabled (left) and disabled (right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 16. Equivalent control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 17. Control loop Bode diagram and fine tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 18. Device initialization: PMBus controlling Vout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 19. VFQFPN48 (6x6 mm) package drawing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
