L6738 ,Single Phase PWM Controller with Light-Load Efficiency OptimizationElectrical characteristics . . . . . . 124 Device description and operation . . . . . 135 S ..
L6738TR ,Single Phase PWM Controller with Light-Load Efficiency OptimizationApplicationsThe current information is monitored across the inductor DCR.■ Memory and termination s ..
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L6740LTR , Hybrid controller (41) for AMD SVID and PVID processors
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LC4064V-75TN100I , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
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L6738-L6738TR
Single Phase PWM Controller with Light-Load Efficiency Optimization
July 2012 Doc ID 18133 Rev 2 1/33
L6738Single-phase PWM controller with light-load efficiency optimization
Datasheet − production data
Features Flexible power supply from 5 V to 12 V bus Power conversion input as low as 1.5 V Light-load efficiency optimization Embedded bootstrap diode VIN detector 0.8 V internal reference 0.5% output voltage accuracy Remote GND recovery High-current integrated drivers Sensorless and programmable precise-OC
sense across inductor DCR OV protection Programmable oscillator up to 600 kHz LS-less to manage pre-bias startup Adjustable output voltage Disable function Internal soft-start VFQFPN 16 3x3 mm package
Applications Memory and termination supply Subsystem power supply (MCH, IOCH, PCI) CPU and DSP power supply Distributed power supply General DC-DC converter
DescriptionThe L6738 is a single-phase step-down controller
with integrated high-current drivers that provides
complete control logic and protection to realize a
DC-DC converter.
The device flexibility allows the management of
conversions with power input VIN as low as 1.5 V
and the device supply voltage ranging from 5 V to
12 V bus.
The L6738 features a proprietary algorithm that
allows light-load efficiency optimization, boosting
efficiency without compromising the output
voltage ripple.
The integrated 0.8 V reference allows the
generation of output voltages with ±0.5%
accuracy over line and temperature variations.
The oscillator is programmable up to 600 kHz.
The L6738 provides a programmable dual-level
overcurrent protection and overvoltage protection.
The current information is monitored across the
inductor DCR.
The L6738 is available in a VFQFPN 16 3x3 mm
package.
Table 1. Device summary
Contents L6738
2/33 Doc ID 18133 Rev 2
Contents Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 6
1.1 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Connection diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 LS-less startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output voltage setting and protections . . . . . . . . . . . . . . . . . . . . . . . . 15
6.1 Overcurrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2 Overcurrent threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High-current embedded drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.1 Boot capacitor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.2 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.1 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.2 Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
L6738 Contents
Doc ID 18133 Rev 2 3/33
10.1 Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
10.2 Output capacitor(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
10.3 Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
List of tables L6738
4/33 Doc ID 18133 Rev 2
List of tables
Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 6. L6738 protection at a glance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 7. VFQFPN16 3x3x1.0 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 8. Exposed pad variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 9. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
L6738 List of figures
Doc ID 18133 Rev 2 5/33
List of figures
Figure 1. Typical application circuit (fast protection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. LS-less startup (left) vs. non-LS-less startup (right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. Current reading network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 7. ROSC vs. switching frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8. Bootstrap capacitor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 9. PWM control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 10. Example of Type III compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 11. Power connections (heavy lines) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 12. Driver turn-on and turn-off paths. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 13. Inductor current ripple vs. output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 14. VFQFPN16 package drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 15. Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Typical application circuit and block diagram L6738
6/33 Doc ID 18133 Rev 2 Typical application circuit and block diagram
1.1 Application circuit
Figure 1. Typical application circuit (fast protection)
L6738 Typical application circuit and block diagram
Doc ID 18133 Rev 2 7/33
Figure 2. Typical application circuit
Typical application circuit and block diagram L6738
8/33 Doc ID 18133 Rev 2
1.2 Block diagram
Figure 3. Block diagram
L6738 Connection diagram and pin description
Doc ID 18133 Rev 2 9/33 Connection diagram and pin description
2.1 Connection diagram
2.2 Pin description
Figure 4. Pin connection (top view)
Table 2. Pin description
Connection diagram and pin description L6738
10/33 Doc ID 18133 Rev 2
2.3 Thermal data
Table 2. Pin description (continued)
Table 3. Thermal data
L6738 Electrical specifications
Doc ID 18133 Rev 2 11/33
3 Electrical specifications
3.1 Absolute maximum ratings
Table 3. Thermal data (continued)
Table 4. Absolute maximum ratings The current sense network needs to be properly biased and loop closed.
Electrical specifications L6738
12/33 Doc ID 18133 Rev 2
3.2 Electrical characteristics
(VCC = 5 V to 12 V; Tj = 0 to 70 °C unless otherwise specified.)
Table 5. Electrical characteristics
L6738 Device description and operation
Doc ID 18133 Rev 2 13/33 Device description and operation
The L6738 is a single-phase PWM controller with embedded high-current drivers that
provides complete control logic and protection to realize a general DC-DC step-down
converter. Designed to drive N-channel MOSFETs in a synchronous buck topology, with its
high level of integration, this 16-pin device allows a reduction of cost and size of the power
supply solution and also provides real-time PGOOD in a compact VFQFPN16 3x3 mm.
The L6738 is designed to operate from a 5 V or 12 V supply. The output voltage can be
precisely regulated to as low as 0.8 V with ±0.5% accuracy over line and temperature
variations. The controller performs remote GND recovery to prevent losses and GND drops
to affect the regulation.
The switching frequency is internally set to 200 kHz and adjustable through the OSC pin.
The IC can be disabled by pulling the OSC pin low.
The L6738 provides a simple control loop with a voltage-mode error amplifier. The error
amplifier features a 15 MHz gain-bandwidth product and 8 V/µs slew rate, allowing high
regulator bandwidth for fast transient response.
To avoid load damages, the L6738 provides overcurrent protection, and overvoltage and
undervoltage protection. The overcurrent trip threshold is monitored through the inductor
DCR, assuring optimum precision, saving the use of an expensive and space-consuming
sense resistor. The output voltage is monitored through the dedicated VSEN pin.
The L6738 implements soft-start by increasing the internal reference in closed loop
regulation. The low-side-less feature allows the device to perform the soft-start over pre-
biased output avoiding high-current return through the output inductor and dangerous
negative spikes at the load side.
The device features a unique synchronization feature that allows the reduction of the input
capacitor RMS current resulting in a cheap and cost-effective system design.
The L6738 is available in a compact VFQFN16 3x3 mm package with exposed pad. Guaranteed by design, not subject to test.
Table 5. Electrical characteristics (continued)
Soft-start L6738
14/33 Doc ID 18133 Rev 2
5 Soft-start
The L6738 implements a soft-start to smoothly charge the output filter avoiding the
requirement of high in-rush currents to the input power supply. During this phase, the device
increases the internal reference from zero up to 0.8 V in closed loop regulation. The soft-
start is implemented only when VCC and VCCDR are above their own UVLO threshold and
the EN pin is set free. When SS takes place, the IC initially waits for 1024 clock cycles and
then starts ramping up the reference in 1024 clock cycles in closed-loop regulation. At the
end of the digital soft-start, the PWRGOOD signal is set free with 3x clock cycles delay.
Protections are active during this phase, as follows: undervoltage is enabled when the reference voltage reaches 80% of the final value overvoltage is always enabled FB disconnection is enabled.
Soft-start time depends on the programmed frequency, initial delay and reference ramp-up
lasts for 1024 clock cycles. SS time and initial delay can be determined as follows:
Equation 1
5.1 LS-less startup
In order to avoid any kind of negative undershoot on the load side during startup, the L6738
performs a special sequence in enabling the drivers for both sections: during the soft-start
phase, the LS MOSFET is kept OFF until the first PWM pulse. This particular sequence
avoids the dangerous negative spike on the output voltage that can occur if starting over a
pre-biased output.
Low-side MOSFET turn-on is masked only from the control loop point of view: protections
are still allowed to turn on the low-side MOSFET in the case of overvoltage, if needed.
Figure 5. LS-less startup (left) vs. non-LS-less startup (right)SS ms[] 1024
Fsw kHz][]------------------------------=
L6738 Output voltage setting and protections
Doc ID 18133 Rev 2 15/33 Output voltage setting and protections
The L6738 is capable of precisely regulating an output voltage as low as 0.8 V. In fact, the
device comes with a fixed 0.8 V internal reference that guarantees the output regulated
voltage to be within ±0.5% tolerance over line and temperature variations (excluding output
resistor divider tolerance, when present).
Output voltage higher than 0.8 V can be easily achieved by adding a resistor ROS between
the FB pin and ground. Referring to Figure 1, the steady-state DC output voltage is:
Equation 2
where VREF is 0.8 V.
The L6738 monitors the voltage at the VSEN pin and compares it to the internal reference
voltage in order to provide undervoltage and overvoltage protection, as well as PGOOD
signal. According to the level of VSEN, different actions are performed from the controller: PGOOD
If the voltage monitored through VSEN exits from the PGOOD window limits, the device
de-asserts the PGOOD signal. PGOOD is asserted at the end of the soft-start phase
with 3x clock cycles delay. Undervoltage protection (UV)
If the voltage at the VSEN pin drops below the UV threshold, the device turns off both
HS and LS MOSFETs, latching the condition. Cycle VCC or EN to recover. UV is also
active during SS acting as VIN detection protection. See description below. Overvoltage protection (OV)
If the voltage at the VSEN pin rises over the OV threshold, overvoltage protection turns
off the HS MOSFET and turns on the LS MOSFET. The LS MOSFET is turned off as
soon as VSEN goes below Vref/2. The condition is latched, cycle VCC/EN to recover.
Note that, even if the device is latched, the device still controls the LS MOSFET and
can switch it on whenever VSEN rises above the OV threshold. PreOVP protection
Monitors VSEN when IC is disabled. If VSEN surpasses the OV threshold, IC turns on
the low-side MOSFET to protect the load. On the EN rising edge, the protection is
disabled and the IC implements the SS procedure. PreOVP is disabled when EN is
high but the OV protection becomes operative. VIN detection
UV protection active during SS allows the IC to detect whether input voltage VIN is
present. If UV is triggered during the soft-start, it resets the SS procedure: the
controller re-implements the initial delay and re-ramps-up the reference with the same
SS timings described in Section 5. The UV protection then avoids that IC starts up if
VIN is not present.
Protections are active also during soft-start (see Section 5).
For proper operations, VCC needs to be at least 1.5 V higher than the programmed output
voltage. OUT V REF 1 RFBOS----------+ ⎝⎠⎛⎞⋅=
Output voltage setting and protections L6738
16/33 Doc ID 18133 Rev 2
6.1 Overcurrent
The overcurrent function protects the converter from a shorted output or overload, by
sensing the output current information across the inductor DCR. This method reduces costs
and enhances converter efficiency by avoiding the use of expensive and space-consuming
sense resistors.
The inductor DCR current sense is implemented by comparing and monitoring the
difference between the CSP and CSN pins. If the monitored voltage is bigger than the
internal thresholds, an overcurrent event is detected.
DCR current sensing requires time constant matching between the inductor and the reading
network:
Equation 3
The L6738 monitors the voltage between CSP and CSN, when this voltage exceeds the OC
threshold, an overcurrent is detected. The IC works in constant current mode, turning on the
low-side MOSFET immediately while the OC persists and, in any case, until the next clock
cycle. After seven consecutive OC events, overcurrent protection is triggered and the IC
latches.
When overcurrent protection is triggered, the device turns off both LS and HS MOSFETs in
a latched condition.
To recover from an overcurrent protection triggered condition, VCC power supply or EN
must be cycled.
For proper current reading, the CSN pin must be filtered by 100 nF (typ.) MLCC to GND.
Table 6. L6738 protection at a glance
DCR------------- RC V CSP-CSN DCRI OUT⋅=⇒⋅=
L6738 Output voltage setting and protections
Doc ID 18133 Rev 2 17/33
6.2 Overcurrent threshold setting
The L6738 detects OC when the difference between CSP and CSN is equal to 20 mV (typ.).
By properly designing the current reading network, it is possible to program the OC
threshold as desired (see Figure6).
Equation 4
Time constant matching is, in this case, designed considering:
Equation 5
This means that once the inductor has been chosen, the two conditions above define the
proper values for R1 and R2.
Figure 6. Current reading network OCP 20mV
DCR---------------- R1 R2+----------------------⋅=
DCR-- ----------- R1//R2() C⋅=
