L6569AD013TR ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORL6569L6569AHIGH VOLTAGE HALF BRIDGEDRIVER WITH OSCILLATOR■ HIGH VOLTAGE RAIL UP TO 600V■ BCD OFF LI ..
L6569D ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORBLOCK DIAGRAMH.V.RHVCVS V BOOTS18SourceCHARGEPUMP7 HVGBIAS LEVEL CBOOTREGULATOR SHIFTERVSHIGHSIDER2 ..
L6569D013TR ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORBLOCK DIAGRAMH.V.RHVCVS V BOOTS18SourceCHARGEPUMP7 HVGBIAS LEVEL CBOOTREGULATOR SHIFTERVSHIGHSIDER2 ..
L6569D013TR ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitI (*) Supply Current 25 mASV Oscillator Resistor ..
L6571 ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORL6571AL6571BHIGH VOLTAGE HALF BRIDGEDRIVER WITH OSCILLATOR■ HIGH VOLTAGE RAIL UP TO 600V■ BCD OFF L ..
L6571A ,HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATORL6571AL6571BHIGH VOLTAGE HALF BRIDGEDRIVER WITH OSCILLATOR■ HIGH VOLTAGE RAIL UP TO 600V■ BCD OFF L ..
LC4032V-10TN44I , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4032V-25TN48C , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4032V-5T44C , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4032V-75T48C , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4032V-75T48C , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4032V-75TN44I , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
L6569AD013TR-L6569D013TR
HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATOR
1/13
L6569
L6569AJune 2000 HIGH VOLTAGE RAIL UP TO 600V BCD OFF LINE TECHNOLOGY INTERNAL BOOTSTRAP DIODE
STRUCTURE 15.6V ZENER CLAMP ON VS DRIVER CURRENT CAPABILITY: SINK CURRENT = 270mA SOURCE CURRENT = 170mA VERY LOW START UP CURRENT: 150μA UNDER VOLTAGE LOCKOUT WITH
HYSTERESIS PROGRAMMABLE OSCILLATOR
FREQUENCY DEAD TIME 1.25μs dV/dt IMMUNITY UP TO ±50V/ns ESD PROTECTION
DESCRIPTIONThe device is a high voltage half bridge driver with
built in oscillator. The frequency of the oscillator can
be programmed using external resistor and capaci-
tor. The internal circuitry of the device allows it to be
driven also by external logic signal.
The output drivers are designed to drive external n-
channel power MOSFET and IGBT. The internal log-
ic assures a dead time [typ. 1.25μs] to avoid cross-
conduction of the power devices.
Two version are available: L6569 and L6569A. They
differ in the low voltage gate driver start up sequence.
HIGH VOLTAGE HALF BRIDGE
DRIVER WITH OSCILLATOR
BLOCK DIAGRAM
L6569 L6569A2/13
ABSOLUTE MAXIMUM RATINGS(*)The device has an internal zener clamp between GND and VS (typical 15.6V).Therefore the circuit should not be driven by a DC low im-
pedance power source.
Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900 V (Human Body Model)
THERMAL DATA
RECOMMENDED OPERATING CONDITIONS
PIN CONNECTION
3/13
L6569 L6569A
PIN FUNCTION
ELECTRICAL CHARACTERISTCS (VS = 12V; VBOOT - VOUT = 12V; Tj = 25°C; unless otherwise specified.)
L6569 L6569A4/13
OSCILLATOR FREQUENCYThe frequency of the internal oscillator can be programmed using external resistor and capacitor.
The nominal oscillator frequency can be calculated using the following equation:
Where RF and CF are the external resistor and capacitor.
The device can be driven in "shut down" condition keeping the CF pin close to GND, but some cares have to be
taken:
1. When CF is to GND the high side driver is off and the low side is on
2. The forced discharge of the oscillator capacitor CF must not be shorter than 1us: a simple way to do this is to
limit the current discharge with a resistive path imposing R · CF >1μs (see fig.1)
Figure 1. OSC 1F CF In2⋅⋅ ⋅---------------- --------------- ---------- 1
1.3863 RFCF⋅⋅--------- --------------- ------------------==
ELECTRICAL CHARACTERISTCS (continued)
5/13
L6569 L6569A
Bootstrap Function The L6569 has an internal Bootstrap structure that enables the user to avoid the external diode needed, in sim-
ilar devices, to perform the charge of the bootstrap capacitor that, in turns, provide an appropriate driving to the
Upper External Mosfet.
The operation is achieved with an unique structure (patented) that uses a High Voltage Lateral DMOS driven
by an internal charge pump (see Block Diagram) and synchronized, with a 50 nsec delay, with the Low Side
Gate driver (LVG pin), actually working as a synchronous rectifier .
The charging path for the Bootstrap capacitor is closed via the Lower External Mosfet that is driven ON (i.e. LVG
High) for a time interval:
TC = RF · CF · In2 → 1.1 · RF · CF
starting from the time the Supply Voltage VS has reached the Turn On Voltage (VSUVP = 9 V typical value).
After time T1 (see waveform Diagram) the LDMOS that charges the Bootstrap Capacitor, is on with a RON=120Ω
(typical value).
In the L6569A a different start up procedure is followed (see waveform Diagram). The Lower External Mosfet is
drive OFF until VS has reached the Turn On Threshold (VSUVPp), then again the TC time interval starts as above.
Being the LDMOS used to implement the bootstrap operation a "bi-directional" switch the current flowing into
the BOOT pin (pin 8) can lead an undue stress to the LDMOS itself if a ZERO VOLTAGE SWITCHING opera-
tions is not ensured, and then an high voltage is applied to the BOOT pin. This condition can occur, for example,
when the load is removed and an high resistive value is placed in series with the gate of the external Power
Mos. To help the user to secure his design a SAFE OPERATING AREA for the Bootstrap LDMOS is provided
(fig. 7).
Let's consider the steps that should be taken.
1) Calculate the Turn on delay ( td ) of your Lower Power MOS:
2) Calculate the Fall time ( tf ) of your Lower Power MOS:
where:
Rg = External gate resistor
Rid = 50Ω, typical equivalent output resistance of the driving buffer (when sourcing current)
VTH, Ciss and Qgd are Power MOS parameters
VS = Low Voltage Supply.
3) Sketch the VBOOT waveform (using log-log scales) starting from the Drain Voltage of the Lower Power MOS
(remember to add the Vs, your Low Voltage Supply, value) on the Bootstrap LDMOS SOA . On fig. 8 an example
is given where:
VS = Low Voltage Supply
VHV = High Voltage Supply Rail
The VBOOT voltage swing must fall below the curve identified by the actual operating frequency of your applica-
tion.d Rg Rid+ () Ciss 1 VTHS
--------------------ln⋅⋅=fg Rid+S VTH–------------------------ Qgd⋅=
L6569 L6569A6/13
DEMO BOARDTo allow an easy evaluation of the device, a P.C. board dedicated to lamp ballast application has been de-
signed.
Fig.11 shows the electrical schematic of a typical ballast application, while the PC and component layout is giv-
en in Fig12. This application has been designed to work with both the 110+/-20%V and the 220 +/- 20%V mains
by means of a voltage doubler configuration at the bulk capacitor. The ballast inductance and the operating fre-
quency are especially designed for a 18 W Sylvania De-luxe T/E type bulb. The PTC for preheat at the start up
and the two back to back synchronization diodes, makes this application easy to implement and safe in opera-
tion.
7/13
L6569 L6569A
Figure 2. Waveforms (L6569)
Figure 3. Waveforms (L6569A)
