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L6391DTRSTN/a10avaiSmartDRIVE HV Half Bridge driver with smartSD and comparator


L6391DTR ,SmartDRIVE HV Half Bridge driver with smartSD and comparatorFeaturessingle-chip half-bridge gate driver for N-channel power MOSFET or IGBT.• High voltage rail ..
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LC3564BS-10 ,64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BS-70 ,64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BT-10 ,64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BT-70 ,64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
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L6391DTR
SmartDRIVE HV Half Bridge driver with smartSD and comparator
May 2013 DocID17892 Rev 2 1/24
L6391

High voltage high and low-side driver
Datasheet - production data
Features
High voltage rail up to 600 V dV/dt immunity ± 50 V/nsec in full temperature
range Driver current capability: 290 mA source 430 mA sink Switching times 75/35 nsec rise/fall with 1 nF
load 3.3 V, 5 V TTL/CMOS inputs with hysteresis Integrated bootstrap diode Comparator for fault protections Smart shutdown function Adjustable deadtime Interlocking function Compact and simplified layout Bill of material reduction Effective fault protection Flexible, easy and fast design
Applications
Motor driver for home appliances, factory
automation, industrial drives and fans HID ballasts, power supply units
Description

The L6391 is a high voltage device manufactured
with the BCD™ “OFF-LINE” technology. It is a
single-chip half-bridge gate driver for N-channel
power MOSFET or IGBT.
The high-side (floating) section is designed to
stand a voltage rail up to 600 V. The logic inputs
are CMOS/TTL compatible down to 3.3 V for easy
interfacing microcontroller/DSP.
An integrated comparator is available for
protections against overcurrent, overtemperature,
etc.
Table 1. Device summary
Package option for evaluation only, not available for production.
Contents L6391
2/24 DocID17892 Rev 2
Contents Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9.1 C BOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DocID17892 Rev 2 3/24
L6391 Block diagram
1 Block diagram
Figure 1. Block diagram
Pin connection L6391
4/24 DocID17892 Rev 2
2 Pin connection
Figure 2. Pin connection (top view)

Table 2. Pin description
The circuit guarantees less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This
allows omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
EDGE
DEADTIME
DocID17892 Rev 2 5/24
L6391 Truth table
3 Truth table

Note: X: don't care
Table 3. Truth table
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