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L6386STN/a952avaiHIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
L6386DSTN/a80avaiHIGH-VOLTAGE HIGH AND LOW SIDE DRIVER


L6386 ,HIGH-VOLTAGE HIGH AND LOW SIDE DRIVERL6386®HIGH-VOLTAGE HIGH AND LOW SIDE DRIVERHIGH VOLTAGE RAIL UP TO 600VdV/dt IMMUNITY +- 50 V/nsec ..
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L6386D ,HIGH-VOLTAGE HIGH AND LOW SIDE DRIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitVout Output Voltage -3 to Vboot - 18 VVcc Supply ..
L6386ED ,HV high and low side driver with embedded comparator and bootstrap diodeElectrical characteristics . . . . . 64.1 AC operation . . . . . . . 64.2 DC operation ..
L6386ED013TR ,HV high and low side driver with embedded comparator and bootstrap diodeFeaturesto work with voltage rail up to 600 V. Both device outputs can independently sink and sourc ..
LC35256FT-70U ,256K (32768 words X 8 bits) SRAM Control Pins: OE and CEAbsolute Maximum RatingsParameter Symbol Conditions Ratings UnitMaximum supply voltage V max 7.0 VC ..
LC3564BM-10 ,64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BM-70 ,64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BS-10 ,64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BS-70 ,64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..
LC3564BT-10 ,64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control PinsOrdering number : EN5804ACMOS ICLC3564B, BS, BM, BT-70/1064K (8192-word · 8-bit) SRAM with OE, CE1, ..


L6386-L6386D
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
gerTpra'
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
HIGH VOLTAGE RAIL UP TO 600V
dV/dt IMMUNITY +- 50 V/nsec iN FULL TEM-
PERATURE RANGE
'' DRIVER CURRENT CAPABILITY:
400 mA SOURCE,
650 mA SINK
'' SWITCHING TIMES 50/30 nsec RISE/FALL
WITH 1nF LOAD
n CMOS/TTL SCHMITT TRIGGER INPUTS
WITH HYSTERESIS AND PULL DOWN
n UNDER VOLTAGE LOCK OUT ON LOWER
AND UPPER DRIVING SECTION
I INTEGRATED BOOTSTRAP DIODE
n OUTPUTS IN PHASE WITH INPUTS
DESCRIPTION
The L6386 is an high-voltage device, manufac-
tured with the BCD "OFF-LINE" technology. It has
a Driver structure that enables to drive inde-
BLOCK DIAGRAM
''-i_ift'1''''i'i'')'''i')'i'i')
ORDERING NUMBERS:
L6386D L6386
pendent referenced Channel Power MOS or
IGBT. The Upper (Floating) Section is enabled to
work with voltage Rail up to 600V. The Logic In-
puts are CMOS/TTL compatible for ease of inter-
facing with controlling devices.
BOOTSTRAP DRIVER
N fN Vboot
I V. I I 14 "
Fl CBOOT
Vcc H.V.
t) UV UV HVG
J.. 4 DETECTION . DETECTION - R DRIVER j
I ',,,,= R I
LEVEL s
HIN t _" SHIFTER OUT
”wield“
TO LOAD
D97IN520D
July 1999
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
Vout Output Voltage -3 to Vboot - 18 V
Vcc Supply Voltage - 0.3 to +18 V
Vboot Floating Supply Voltage -1 to 618 V
thg Upper Gate Output Voltage - 1 to Vboot V
Vlvg Lower Gate Output Voltage -0.3 to Vcc +0.3 V
Vi Logic Input Voltage -0.3 to Vcc +0.3 V
Vdiag Open Drain Forced Voltage -0.3 to Vcc +0.3 V
Vcin Comparator Input Voltage -0.3 to Vcc +0.3 V
dVout/dt Allowed Output Slew Rate 50 V/ns
Ptot Total Power Dissipation (Tj = 85 °C) 750 mW
Tj Junction Temperature 150 ''C
Ts Storage Temperature -50 to 150 °C
Note: ESD immunity for pins 12, 13 and 14 is guaranteed up to 900V (Human Body Model)
PIN CONNECTION
LIN E 1 V 14 Cl vboot
SD E 2 13 Cl HVG
HIN E 3 12 Cl OUT
Vcc E 4 11 Cl NC.
DIAG E 5 10 Cl NC.
CIN E 6 Cl LVG
SGND E 7 Cl PGND
DQ7IN521A
THERMAL DATA
Symbol Parameter SO14 DIP14 Unit
Rm j-amb Thermal Resistance Junction to Ambient 165 100 ''C/W
PIN DESCRIPTION
N. Name Type Function
1 LIN I Lower Driver Logic Input
2 SD (*) I Shut Down Logic Input
3 HIN I Upper Driver Logic Input
4 VCC I Low Voltage Supply
5 DIAG 0 Open Drain Diagnostic Output
6 CIN I Comparator Input
7 SGND Ground
8 PGND Power Ground
9 LVG (*) 0 Low Side Driver Output
10, 11 N.C. Not Connected
12 OUT 0 Upper Driver Floating Driver
13 HVG (*) 0 High Side Driver Output
14 Vboot Bootstrapped Supply Voltage
(*) The circuit guarantees 0.3V maximum on the pin (@ Isink = 10mA), with VCC >3V. This allows to omit the "bleeder" resistor connected
between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also
in SD condition.
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