L6235PD013TR Fast Delivery |IC PHOENIX CO.,LIMITED

L6235PD013TR ,DMOS DRIVER FOR THREE-PHASE BRUSHLESS DC MOTORABSOLUTE MAXIMUM RATINGSSymbol Parameter Test conditions Value UnitV Supply Voltage V = V = V 60 VS ..
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L6235PD013TR
DMOS DRIVER FOR THREE-PHASE BRUSHLESS DC MOTOR
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L6235
September 2003 OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 5.6A OUTPUT PEAK CURRENT (2.8A DC) RDS(ON) 0.3Ω TYP. VALUE @ Tj = 25 °C OPERATING FREQUENCY UP TO 100KHz NON DISSIPATIVE OVERCURRENT
DETECTION AND PROTECTION DIAGNOSTIC OUTPUT CONSTANT tOFF PWM CURRENT CONTROLLER SLOW DECAY SYNCHR. RECTIFICATION 60° & 120° HALL EFFECT DECODING LOGIC BRAKE FUNCTION TACHO OUTPUT FOR SPEED LOOP CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN UNDERVOLTAGE LOCKOUT INTEGRATED FAST FREEWEELING DIODES
DESCRIPTION
The L6235 is a DMOS Fully Integrated Three-Phase
Motor Driver with Overcurrent Protection.
Realized in MultiPower-BCD technology, the device
combines isolated DMOS Power Transistors with
CMOS and bipolar circuits on the same chip.
The device includes all the circuitry needed to drive a
three-phase BLDC motor including: a three-phase
DMOS Bridge, a constant off time PWM Current Con-
troller and the decoding logic for single ended hall
sensors that generates the required sequence for the
power stage.
Available in PowerDIP24 (20+2+2), PowerSO36 and
SO24 (20+2+2) packages, the L6235 features a non-
dissipative overcurrent protection on the high side
Power MOSFETs and thermal shutdown.
BLOCK DIAGRAM
DMOS DRIVER FOR
THREE-PHASE BRUSHLESS DC MOTOR
L6235
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITION
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L6235
THERMAL DATA
PIN CONNECTIONS (Top view)
(5) The slug is internally connected to pins 1, 18, 19 and 36 (GND pins).
(1) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm2 (with a thickness of 35 μm).
(2) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm).
(3) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm),
16 via holes and a ground layer.
(4) Mounted on a multi-layer FR4 PCB without any heat-sinking surface on the board.
L6235
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PIN DESCRIPTION
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L6235
ELECTRICAL CHARACTERISTICS
(VS = 48V , Tamb = 25 °C , unless otherwise specified)
Output DMOS Transistors
Source Drain Diodes
Logic Input (H1, H2, H3, EN, FWD/REV, BRAKE)
PIN DESCRIPTION (continued)
L6235
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(6) Tested at 25°C in a restricted range and guaranteed by characterization.
(7) See Fig. 1.
(8) Measured applying a voltage of 1V to pin SENSE and a voltage drop from 2V to 0V to pin VREF.
(9) See Fig. 2.
Switching Characteristics
PWM Comparator and Monostable
Tacho Monostable
Over Current Detection & Protection
ELECTRICAL CHARACTERISTICS (continued)
(VS = 48V , Tamb = 25 °C , unless otherwise specified)
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L6235
Figure 2. Overcurrent Detection Timing Definition
L6235
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CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP
The L6235 integrates a Three-Phase Bridge, which
consists of 6 Power MOSFETs connected as shown
on the Block Diagram. Each Power MOS has an
RDS(ON) = 0.3Ω (typical value @25°C) with intrinsic
fast freewheeling diode. Switching patterns are gen-
erated by the PWM Current Controller and the Hall
Effect Sensor Decoding Logic (see relative para-
graphs). Cross conduction protection is implemented
by using a dead time (tDT = 1μs typical value) set by
internal timing circuit between the turn off and turn on
of two Power MOSFETs in one leg of a bridge.
Pins VSA and VSB MUST be connected together to
the supply voltage (VS).
Using N-Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped Supply
(VBOOT) is obtained through an internal oscillator and
few external components to realize a charge pump
circuit as shown in Figure 3. The oscillator output (pin
VCP) is a square wave at 600KHz (typically) with 10V
amplitude. Recommended values/part numbers for
the charge pump circuit are shown in Table1.
Table 1. Charge Pump External Component
Values.
Figure 3. Charge Pump Circuit
LOGIC INPUTS
Pins FWD/REV, BRAKE, EN, H1, H2 and H3 are TTL/
CMOS and μC compatible logic inputs. The internal
structure is shown in Figure 4. Typical value for turn-
ON and turn-OFF thresholds are respectively Vth(ON)
= 1.8V and Vth(OFF) = 1.3V.
Pin EN (enable) may be used to implement Overcurrent
and Thermal protection by connecting it to the open col-
lector DIAG output If the protection and an external dis-
able function are both desired, the appropriate
connection must be implemented. When the external
signal is from an open collector output, the circuit in Fig-
ure 5 can be used . For external circuits that are push
pull outputs the circuit in Figure 6 could be used. The re-
sistor REN should be chosen in the range from 2.2KΩ to
180KΩ. Recommended values for REN and CEN are re-
spectively 100KΩ and 5.6nF. More information for se-
lecting the values can be found in the Overcurrent
Protection section.
Figure 4. Logic Input Internal Structure
Figure 6. Pin EN Push-Pull Driving
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L6235
PWM CURRENT CONTROL
The L6235 includes a constant off time PWM Current Controller. The current control circuit senses the bridge
current by sensing the voltage drop across an external sense resistor connected between the source of the
three lower power MOS transistors and ground, as shown in Figure 7. As the current in the motor increases the
voltage across the sense resistor increases proportionally. When the voltage drop across the sense resistor be-
comes greater than the voltage at the reference input pin VREF the sense comparator triggers the monostable
switching the bridge off. The power MOS remain off for the time set by the monostable and the motor current
recirculates around the upper half of the bridge in Slow Decay Mode as described in the next section. When the
monostable times out, the bridge will again turn on. Since the internal dead time, used to prevent cross conduc-
tion in the bridge, delays the turn on of the power MOS, the effective Off Time tOFF is the sum of the monostable
time plus the dead time.
Figure 8 shows the typical operating waveforms of the output current, the voltage drop across the sensing re-
sistor, the pin RC voltage and the status of the bridge. More details regarding the Synchronous Rectification and
the output stage configuration are included in the next section.
Immediately after the Power MOS turn on, a high peak current flows through the sense resistor due to the re-
verse recovery of the freewheeling diodes. The L6235 provides a 1μs Blanking Time tBLANK that inhibits the
comparator output so that the current spike cannot prematurely retrigger the monostable.
Figure 7. PWM Current Controller Simplified Schematic
L6235
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Figure 8. Output Current Regulation Waveforms
Figure 9 shows the magnitude of the Off Time tOFF versus COFF and ROFF values. It can be approximately cal-
culated from the equations:
tRCFALL = 0.6 · ROFF · COFF
tOFF = tRCFALL + tDT = 0.6 · ROFF · COFF + tDT
where ROFF and COFF are the external component values and tDT is the internally generated Dead Time with:
20KΩ ≤ ROFF ≤ 100KΩ
0.47nF ≤ COFF ≤ 100nF
tDT = 1μs (typical value)
Therefore:
tOFF(MIN) = 6.6μs
tOFF(MAX) = 6ms
These values allow a sufficient range of tOFF to implement the drive circuit for most motors.
The capacitor value chosen for COFF also affects the Rise Time tRCRISE of the voltage at the pin RCOFF. The
Rise Time tRCRISE will only be an issue if the capacitor is not completely charged before the next time the
monostable is triggered. Therefore, the On Time tON, which depends by motors and supply parameters, has to
be bigger than tRCRISE for allowing a good current regulation by the PWM stage. Furthermore, the On Time tON
can not be smaller than the minimum on time tON(MIN).
tRCRISE = 600 · COFFONtON MIN()> 1.5μs (typ. value)=ONt RCRISEtDT–>
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L6235
Figure 10 shows the lower limit for the On Time tON for having a good PWM current regulation capacity. It has
to be said that tON is always bigger than tON(MIN) because the device imposes this condition, but it can be smaller
than tRCRISE - tDT. In this last case the device continues to work but the Off Time tOFF is not more constant.
So, small COFF value gives more flexibility for the applications (allows smaller On Time and, therefore, higher
switching frequency), but, the smaller is the value for COFF, the more influential will be the noises on the circuit
performance.
Figure 9. tOFF versus COFF and ROFF.
Figure 10. Area where tON can vary maintaining the PWM regulation.
L6235
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SLOW DECAY MODE
Figure 11 shows the operation of the bridge in the Slow Decay mode during the Off Time. At any time only two
legs of the three-phase bridge are active, therefore only the two active legs of the bridge are shown in the figure
and the third leg will be off. At the start of the Off Time, the lower power MOS is switched off and the current
recirculates around the upper half of the bridge. Since the voltage across the coil is low, the current decays slow-
ly. After the Dead Time the upper power MOS is operated in the synchronous rectification mode reducing the
impendence of the freewheeling diode and the related conducting losses. When the monostable times out, up-
per MOS that was operating the synchronous mode turns off and the lower power MOS is turned on again after
some delay set by the Dead Time to prevent cross conduction.
Figure 11. Slow Decay Mode Output Stage Configurations
DECODING LOGIC
The Decoding Logic section is a combinatory logic that provides the appropriate driving of the three-phase
bridge outputs according to the signals coming from the three Hall Sensors that detect rotor position in a 3-
phase BLDC motor. This novel combinatory logic discriminates between the actual sensor positions for sensors
spaced at 60, 120, 240 and 300 electrical degrees. This decoding method allows the implementation of a uni-
versal IC without dedicating pins to select the sensor configuration.
There are eight possible input combinations for three sensor inputs. Six combinations are valid for rotor posi-
tions with 120 electrical degrees sensor phasing (see Figure 12, positions 1, 2, 3a, 4, 5 and 6a) and six combi-
nations are valid for rotor positions with 60 electrical degrees phasing (see Figure 14, positions 1, 2, 3b, 4, 5
and 6b). Four of them are in common (1, 2, 4 and 5) whereas there are two combinations used only in 120 elec-
trical degrees sensor phasing (3a and 6a) and two combinations used only in 60 electrical degrees sensor phas-
ing (3b and 6b).
The decoder can drive motors with different sensor configuration simply by following the Table 2. For any input
configuration (H1, H2 and H3) there is one output configuration (OUT1, OUT2 and OUT3). The output configura-
tion 3a is the same than 3b and analogously output configuration 6a is the same than 6b.
The sequence of the Hall codes for 300 electrical degrees phasing is the reverse of 60 and the sequence of the
Hall codes for 240 phasing is the reverse of 120. So, by decoding the 60 and the 120 codes it is possible to drive
the motor with all the four conventions by changing the direction set.
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L6235
Table 2. 60 and 120 Electrical Degree Decoding Logic in Forward Direction.
Figure 12. 120° Hall Sensor Sequence.
Figure 13. 60° Hall Sensor Sequence.

Partno	Mfg	Dc	Qty	Available	Descript
L6235PD013TR	STM	N/a	42	avai	DMOS DRIVER FOR THREE-PHASE BRUSHLESS DC MOTOR