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L5981STN/a255avaiUp to 1 A step down switching regulator


L5981 ,Up to 1 A step down switching regulatorFunctional description . . . . . . . 84.1 Oscillator and synchronization . . 94.2 Soft-sta ..
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L5981
Up to 1 A step down switching regulator
May 2014 DocID13004 Rev 7 1/37
L5981

1 A step-down switching regulator
Datasheet - production data
Features
1 A DC output current 2.9 V to 18 V input voltage Output voltage adjustable from 0.6 V 250 kHz switching frequency, programmable
up to 1 MHz Internal soft-start and inhibit Low dropout operation: 100% duty cycle Voltage feedforward Zero load current operation Overcurrent and thermal protection VFQFPN8 3 mm x 3 mm package
Applications
Consumer: STB, DVD, DVD recorder, car
audio, LCD TV and monitors Industrial: chargers, PLD, PLA, FPGA Networking: XDSL, modems, DC-DC modules Computer: optical storage, hard disk drive,
printers, audio/graphic cards LED driving
Description

The L5981 is a step-down switching regulator
with a 1.5 A (min.) current limited embedded
Power MOSFET, so it is able to deliver in excess
of 1 A DC current to the load depending on the
application condition.
The input voltage can range from 2.9 V to 18 V,
while the output voltage can be set starting from
0.6 V to VIN. Having a minimum input voltage of
2.9 V, the device is suitable also for a 3.3 V bus.
Requiring a minimum set of external components,
the device includes an internal 250 kHz switching
frequency oscillator that can be externally
adjusted up to 1 MHz.
The VFQFPN8 package with an exposed pad
allows reducing the RthJA down to approximately
60 °C/W.

Figure 1. Application circuit
Contents L5981
2/37 DocID13004 Rev 7
Contents Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.3 Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.5 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4.1 Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.2 Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.5 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.7 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DocID13004 Rev 7 3/37
L5981 Contents Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Pin settings L5981
4/37 DocID13004 Rev 7
1 Pin settings
1.1 Pin connection
1.2 Pin description


Table 1. Pin description
DocID13004 Rev 7 5/37
L5981 Maximum ratings
2 Maximum ratings
2.1 Absolute maximum ratings


2.2 Thermal data


Table 2. Absolute maximum ratings
Table 3. Thermal data
Package mounted on demonstration board.
Electrical characteristics L5981
6/37 DocID13004 Rev 7
3 Electrical characteristics

TJ = 25 °C, VCC = 12 V, unless otherwise specified.
Table 4. Electrical characteristics
DocID13004 Rev 7 7/37
L5981 Electrical characteristics
Specification referred to TJ from -40 to +125 °C. Specification in the -40 to +125 °C temperature range are assured by design, characterization and statistical correlation. Guaranteed by design.
Table 4. Electrical characteristics (continued)
Functional description L5981
8/37 DocID13004 Rev 7
4 Functional description

The L5981 device is based on a “voltage mode”, constant frequency control. The output
voltage VOUT is sensed by the feedback pin (FB) compared to an internal reference (0.6 V)
providing an error signal that, compared to a fixed frequency sawtooth, controls the on and
off time of the power switch.
The main internal blocks are shown in the block diagram in Figure 3. They are: A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the
synchronization signal. Its switching frequency can be adjusted by an external resistor.
The voltage and frequency feedforward are implemented. The soft-start circuitry to limit inrush current during the startup phase. The voltage mode error amplifier The pulse width modulator and the relative logic circuitry necessary to drive the internal
power switch. The high-side driver for embedded P-channel Power MOSFET switch. The peak current limit sensing block, to handle overload and short-circuit conditions. A voltage regulator and internal reference. It supplies internal circuitry and provides
a fixed internal reference. A voltage monitor circuitry (UVLO) that checks the input and internal voltages. A thermal shutdown block, to prevent thermal runaway.
Figure 3. Block diagram
DocID13004 Rev 7 9/37
L5981 Functional description
4.1 Oscillator and synchronization

Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides
a constant frequency clock. Its frequency depends on the resistor externally connected to
the FSW pin. In case the FSW pin is left floating, the frequency is 250 kHz; it can be
increased as shown in Figure 6 by an external resistor connected to ground. o improve the line transient performance keeping the PWM gain constant versus the input
voltage, the voltage feedforward is implemented by changing the slope of the sawtooth
according to the input voltage change (see Figure 5.a).
The slope of the sawtooth also changes if the oscillator frequency is increased by the
external resistor. In this way a frequency feedforward is implemented (Figure 5.b) in order to
keep the PWM gain constant versus the switching frequency (see Section 5.4 on page 18
for PWM gain expression).
On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of
180° with respect to the clock. This delay is useful when two devices are synchronized
connecting the SYNCH pin together. When SYNCH pins are connected, the device with
higher oscillator frequency works as a master, so the slave device switches at the frequency
of the master but with a delay of half a period. This minimizes the RMS current flowing
through the input capacitor (see the L5988D datasheet).
Figure 4. Oscillator circuit block diagram

The device can be synchronized to work at higher frequency feeding an external clock
signal. The synchronization changes the sawtooth amplitude, changing the PWM gain
(Figure 5.c). This changing has to be taken into account when the loop stability is studied. o minimize the change of the PWM gain, the free running frequency should be set (with
a resistor on the FSW pin) only slightly lower than the external clock frequency. This pre-
adjusting of the frequency will change the sawtooth slope in order to get negligible the
truncation of sawtooth, due to the external synchronization.
Functional description L5981
10/37 DocID13004 Rev 7
Figure 5. Sawtooth: voltage and frequency feedforward; external synchronization
Figure 6. Oscillator frequency versus FSW pin resistor
DocID13004 Rev 7 11/37
L5981 Functional description
4.2 Soft-start
Functional description L5981
12/37 DocID13004 Rev 7
4.3 Error amplifier and compensation

The error amplifier (E/A) provides the error signal to be compared with the sawtooth to
perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V
voltage reference, while its inverting input (FB) and output (COMP) are externally available
for feedback and frequency compensation. In this device the error amplifier is a voltage
mode operational amplifier, so with high DC gain and low output impedance.
The uncompensated error amplifier characteristics are the following:

In continuous conduction mode (CCM), the transfer function of the power section has two
poles due to the LC filter and one zero due to the ESR of the output capacitor. Different
kinds of compensation networks can be used depending on the ESR value of the output
capacitor. In case the zero introduced by the output capacitor helps to compensate the
double pole of the LC filter, a type II compensation network can be used. Otherwise,
a type III compensation network has to be used (see Section 5.4 on page 18 for details
about the compensation network selection).
Anyway the methodology to compensate the loop is to introduce zeros to obtain a safe
phase margin.
Table 5. Uncompensated error amplifier characteristics
DocID13004 Rev 7 13/37
L5981 Functional description
4.4 Overcurrent protection

The L5981 device implements the overcurrent protection sensing current flowing through
the Power MOSFET. Due to the noise created by the switching activity of the Power
MOSFET, the current sensing is disabled during the initial phase of the conduction time.
This avoids an erroneous detection of a fault condition. This interval is generally known as
“masking time” or “blanking time”. The masking time is about 200 ns.
When the overcurrent is detected, two different behaviors are possible depending on the
operating condition. Output voltage in regulation. When the overcurrent is sensed, the Power MOSFET is
switched off and the internal reference (VREF), that biases the non-inverting input of the
error amplifier, is set to zero and kept in this condition for a soft-start time (TSS, 2048
clock cycles). After this time, a new soft-start phase takes place and the internal
reference begins ramping (see Figure 8.a).
2. Soft-start phase. If the overcurrent limit is reached, the Power MOSFET is turned off
implementing the pulse by pulse overcurrent protection. During the soft-start phase,
under overcurrent condition, the device can skip pulses in order to keep the output
current constant and equal to the current limit. If at the end of the “masking time” the
current is higher than the overcurrent threshold, the Power MOSFET is turned off and it
will skip one pulse. If, at the next switching on at the end of the “masking time” the
current is still higher than the threshold, the device will skip two pulses. This
mechanism is repeated and the device can skip up to seven pulses. While, if at the end
of the “masking time” the current is lower than the overcurrent threshold, the number of
skipped cycles is decreased of one unit. At the end of soft-start phase the output
voltage is in regulation and if the overcurrent persists, the behavior explained above
takes place (see Figure 8.b).
So the overcurrent protection can be summarized as a “hiccup” intervention when the output
is in regulation and a constant current during the soft-start phase. If the output is shorted to
ground when the output voltage is on regulation, the overcurrent is triggered and the device
starts cycling with a period of 2048 clock cycles between “hiccup” (Power MOSFET off and
no current to the load) and “constant current” with very short on-time and with reduced
switching frequency (up to one eighth of normal switching frequency). See Figure 32 on
page 33 for short-circuit behavior.
Functional description L5981
14/37 DocID13004 Rev 7
Figure 8. Overcurrent protection strategy
4.5 Inhibit function

The inhibit feature allows to put the device into standby mode. With the INH pin higher than
1.9 V the device is disabled and the power consumption is reduced to less than 30 A. With
the INH pin lower than 0.6 V, the device is enabled. If the INH pin is left floating, an internal
pull up ensures that the voltage at the pin reaches the inhibit threshold and the device is
disabled. The pin is also VCC compatible.
4.6 Hysteretic thermal shutdown

The thermal shutdown block generates a signal that turns off the power stage if the junction
temperature goes above 150 °C. Once the junction temperature goes back to about 130 °C,
the device restarts in normal operation. The sensing element is very close to the PDMOS
area, so ensuring an accurate and fast temperature detection.
DocID13004 Rev 7 15/37
L5981 Application information
5 Application information
5.1 Input capacitor selection
Application information L5981
16/37 DocID13004 Rev 7
5.2 Inductor selection
DocID13004 Rev 7 17/37
L5981 Application information
5.3 Output capacitor selection
Application information L5981
18/37 DocID13004 Rev 7
5.4 Compensation network
DocID13004 Rev 7 19/37
L5981 Application information
5.4.1 Type III compensation network
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