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L4975
5A SWITCHING REGULATOR
L4975A SWITCHING REGULATOR OUTPUT CURRENT
5.1V TO 40V OUTPUT VOLTAGERANGE TO 90% DUTY CYCLE RANGE
INTERNAL FEED-FORWARD LINE REGULA-
TION
INTERNAL CURRENT LIMITING
PRECISE 5.1V± 2% ON CHIP REFERENCE
RESET AND POWER FAIL FUNCTIONS
SOFTSTART
INPUT/OUTPUT SYNC PIN
UNDER VOLTAGE LOCK OUT WITH HYS-
TERETICTURN-ON
PWM LATCH FOR SINGLE PULSE PER PE-
RIOD
VERY HIGH EFFICIENCY
SWITCHING FREQUENCY UP TO 500KHz
THERMAL SHUTDOWN
CONTINUOUS MODE OPERATION
DESCRIPTIONThe L4975Aisa stepdown monolithic power
switching regulator delivering5Aata voltage vari-
able from 5.1to 40V.
Realized with BCD mixed technology, the device
usesa DMOS output transistorto obtain very high
efficiency and very fast switching times. Features the L4975A include reset and power fail for mi-
croprocessors, feed forward line regulation, soft
start, limiting current and thermal protection. The
deviceis mountedina 15-lead multiwatt plastic
power package and requires few external compo-
nents. Efficient operationat switching frequenciesto 500KHz allows reductionin the size and
costof external filter components.
June 2000
BLOCK DIAGRAM
Multiwatt15V
ORDERING NUMBER: L4975A
MULTIPOWER BCD TECHNOLOGY1/21
PIN CONNECTION (Top view)
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit Input Voltage 55 V Input Operating Voltage 50 V Output DC Voltage
Output Peak Voltageatt= 0.1μsf= 200KHz Maximum Output Current Internally Limited Bootstrap Voltage
Bootstrap Operating Voltage +15
V3,V12 Input Voltageat Pins3,12 12 V Reset Output Voltage 50 V Reset Output Sink Current 50 mA
V5,V10,V11, V13 Input VoltageatPin5,10, 11,13 7 V Reset Delay Sink Current 30 mA
I10 Error Amplifier Output Sink Current 1 A
I12 Soft Start Sink Current 30 mA
Ptot Total Power Dissipationat Tcase< 120°C30 W
Tj,Tstg Junction and Storage Temperature -40to 150 °C
THERMAL DATA
Symbol Parameter Value UnitRth j-case
Rthj-amb
Thermal Resistance Junction-case max
Thermal Resistance Junction-ambient max
°C/W
°C/W
L4975A2/21
CIRCUIT OPERATION (referto the block dia-
gram)
The L4975Aisa 5A monolithic stepdownswitching
regulator workingin continuous mode realizedin
the new BCD Technology. This technology allows
the integrationof isolated vertical DMOS power
transistorsplus mixed CMOS/Bipolartransistors.
The device can deliver 5Aat an output voltage
adjustable from 5.1Vto 40V, and contains diag-
nostic and control functions that makeit particu-
larly suitablefor microprocessor based systems.
BLOCK DIAGRAMThe block diagram shows the DMOS power tran-
sistor and the PWM control loop. Integrated func-
tions includea reference voltage trimmedto 5.1V± 2%, soft start, undervoltage lockout, oscillator
with feedforward control, pulse by pulse current
limit, thermal shutdown and finally the reset and
power fail circuit. The reset and power fail circuit
providesan output signalfora microprocessorin-
dicating the statusof the system.
Device turn onis around 11V witha typical 1V
hysteresis, this threshold providesa correct volt-
age for the driving stageof the DMOS gate and
the hysteresis prevents instabilities. external bootstrap capacitor chargedto 12Van internal voltage referenceis neededto pro-
vide correct gate driveto the power DMOS. The
driving circuitis ableto source and sink peak cur-
rentsof around 0.5Ato the gateof the DMOS
transistor.A typical switching timeof the current the DMOS transistoris 50ns. Dueto the fast
commutation switching frequenciesupto 500kHz
are possible.
The PWM control loop consistsofa sawtooth os-
cillator, error amplifier, comparator, latch and the
output stage. An error signalis producedby com-
paring the output voltage with the precise 5.1V± on chip reference. This error signalis then
compared with the sawtooth oscillator,in orderto
generatea fixed frequency pulse width modulated
drive for the output stage.A PWM latchis in-
cludedto eliminate multiple pulsing withina pe-
riod evenin noisy environments. The gain and
PIN FUNCTIONSo
Name Function OSCILLATOR Rosc. External resistor connectedto ground determinesthe constant charging
currentof Cosc. OSCILLATOR Cosc. External capacitor connectedto ground determines (with Rosc) the
switching frequency. RESET INPUT Inputof Power Fail Circuit. The thresholdis 5.1V.It maybe connectedviaa
dividerto theinputfor powerfail function.It mustbe connected tothe pin14an
external 30KΩ resistor when powerfail signal not required. RESET OUT Open Collector Reset/power Fail Signal Output. This outputis high whenthe
supply and the outputvoltages are safe. RESET DELAY ACd capacitor connected between this terminal and ground determinesthe
reset signal delay time. BOOTSTRAP A Cboot capacitor connected between this terminal andthe output allowsto
drive properlythe internal D-MOS transistor. OUTPUT Regulator Output. GROUND Common Ground Terminal SUPPLY VOLTAGE Unregulated Input Voltage. FREQUENCY
COMPENSATION series RC network connected between this terminal and ground determines
the regulation loop gain characteristics. FEEDBACK INPUT The Feedback Terminalofthe Regulation Loop. The outputis connected
directlyto this terminalfor 5.1V operation;Itis connectedviaa dividerfor higher
voltages. SOFT START Soft Start Time Constant.A capacitoris connected betweenthi sterminaland
groundto define the soft start time constant. SYNC INPUT Multiple L4975A are synchronizedby connectingpin13 inputs togetherorvia external syncr. pulse. Vref 5.1V Vref Device Reference Voltage. Vstart Internal Start-up Circuitto Drivethe Power Stage.
L4975A3/21
Figure1: FeedforwardWaveform
Figure3: Limiting Current Function
Figure2: Soft Start Function
L4975A4/21
stabilityof the loop canbe adjustedby an exter-
nal RC network connectedto the outputof the er-
ror amplifier.A voltage feedforward control has
been addedto the oscillator, this maintains supe-
rior line regulation overa wide input voltage
range. Closing the loop directly gives an output
voltageof 5.1V, higher voltages are obtainedby
insertinga voltage divider. turn on output overcurrents are preventedby
the soft start function (fig.2). The error amplifieris
initially clampedbyan external capacitor Css and
allowedto rise linearly under the chargeof anin-
ternalconstant current source.
Output overload protectionis providedbya cur-
rent limit circuit (fig.3). The load currentis sensed an internal metal resistor connectedtoa com-
parator. When the load current exceedsa preset
threshold the outputof the comparator setsa flip
flop which turns off the power DMOS. The next
clock pulse, from an internal 40kHz oscillator will
reset the flip flop and the power DMOS will again
conduct. This current protection method, ensures constant current output when the systemis
overloaded or short circuited and limits the
switching frequency,in this condition,to 40kHz.
The Reset and Power fail circuitry (fig4) gener-
atesan output signal when the supply voltage ex-
ceedsa threshold programmed by an external
voltage divider. The reset signal,is generated
witha delay time programmedby an external ca-
pacitoron the delay pin. When the supply voltage
falls below the thresholdor the output voltage
goes below 5V the reset output goes low immedi-
ately. The reset outputisan open collector-drain.
Fig 4A shows the case when the supply voltageis
higher than the threshold, but the output voltage not yet 5V.
Fig 4B shows the case when the outputis 5.1V
but the supply voltageis not yet higher than the
fixed threshold.
The thermal protection disables circuit operation
when the junction temperature reaches about
150°C and hasan hysterysisto prevent unstable
conditions.
Figure4: Reset and Power Fail Functions.
L4975A5/21
ELECTRICAL CHARACTERISTICS (Referto the test circuit,Tj =25°C,Vi= 35V,R4= 16KΩ,= 2.2nF, fSW= 200KHztyp, unless otherwise specified)
DYNAMIC CHARACTERISTICS
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig. input Voltage Range (pin9) Vo =Vrefto 40V =5A 50 V 5 Output Votage Vi= 15Vto 50V= 3A;Vo =Vref 5.1 5.2 V 5
ΔVo Line Regulation Vi= 15Vto 50V= 2A;Vo =Vref 30 mV 5
ΔVo Load Regulation Vo =Vref =2Ato4A =1Ato5A Dropout Voltage Between
Pin9 and7 =3A =5A
I7L Max. Limiting Current Vi=15to 50V =Vrefto 40V
5.5 6.5 7.5 A 5 Efficiency Io =3A =Vref= 12V 75 =5A =Vref= 12V 85
SVR Supply Voltage Ripple
Reject.= 2VRMS;Io =3A= 100Hz;Vo =Vref 60 dB 5 Switching Frequency 180 200 220 KHz 5fVi
Voltage Stabilityof
Swiching Frequency= 15Vto 45V 2 6 % 5f
Temperature Stabilityof
Swiching Frequency=0to 125°C1 % 5
fmax Maximum Operating
Switching Frequency =Vref;R4= 10KΩ= 5A;C9= 1nF
500 KHz 5
Vref SECTION (pin 14)
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.V14 Reference Voltage 5 5.1 5.2 V 7
ΔV14 Line Regulation Vi= 15Vto 50V 10 25 mV 7
ΔV14 Load Regulation I14= 0to 1mA 20 40 mV 7 V14
Average Temperature
Coefficient Reference
Voltage =0°Cto 125°C 0.4 mV/°C7
I14 short Short Circuit Current Limit V14=0 70 mA 7
VSTART SECTION(pin 15)
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.V15 Reference Voltage 11.4 12 12.6 V 7
ΔV15 Line Regulation Vi=15to 50V 0.6 1.4 V 7
ΔV15 Load Regulation I15= 0to 1mA 50 200 mV 7
I15 short Short Circuit Current Limit V15 =0V 80 mA 7
L4975A6/21
ELECTRICAL CHARACTERISTICS (continued) CHARACTERISTICS
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.V9on Turn-on Threshold 10 11 12 V 7AHyst Turn-off Hysteresys 1 V 7A
I9Q Quiescent Current V12 =0; S1=D 13 19 mA 7A
I9OQ Operating Supply Current V12=0; S1=C; S2=B 16 23 mA 7A
I7L Out Leak Current Vi= 55V; S3=A; V12=0 2 mA 7A
SOFT START
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.I12 Soft Start Source Current V12= 3V; V11=0V 70 100 130 μA7B
V12 Output Saturation Voltage I12= 20mA;V9= 10V
I12= 200μA;V9= 10V
ERROR AMPLIFIER
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.V10H High Level Out Voltage I10= -100μA; S1=C
V11= 4.7V 7C
V10L Low Level Out Voltage I10= +100μA; S1=C
V11= 5.3V;
1.2 V 7C
I10H Source Output Current V10= 1V;S1=E
V11= 4.7V
100 150 μA7C
I10L Sink Output Current V10= 6V;S1=D
V11= 5.3V
100 150 μA7C
I11 Input Bias Current RS= 10KΩ 0.4 3 μA– DC Open Loop Gain VVCM= 4V; =10Ω dB –
SVR Supply Voltage Rejection 15
VOS Input Offset Voltage RS =50Ω 210 mV –
RAMP GENERATOR (pin2)
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig. Ramp Valley S1=C;S2=B 1.2 1.5 V 7A Ramp Peak S1=C Vi= 15V=B Vi= 45V
5.5 Min. Ramp Current S1=A;I1= 100μA 270 300 μA7A Max. Ramp Current S1=A;I1= 1mA 2.4 2.7 mA 7A
SYNC FUNCTION (pin 13)
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.
V13 Low Input Voltage Vi= 15Vto 50V; V12 =0;=C; S2=B; S4=B
–0.3 0.9 V 7A
V13 High Input voltage V12 =0;=C; S2=B; S4=B
3.5 5.5 V 7A
I13L Sync Input Current with
Low Input Voltage =V13= 0.9V; S4=A;=C; S2=B
0.4 mA 7A
I13H Input Current with High
Input Voltage
V13= 3.5V; S4=A;=C; S2=B
2mA 7A
V13 Output Amplitude 4 5 V – Output Pulse Width Vthr= 2.5V 0.3 0.5 0.8 μs–
L4975A
7/21
ELECTRICAL CHARACTERISTICS (continued)
RESET AND POWER FAIL FUNCTIONS
Symbol Parameter TestCondition Min. Typ. Max. Unit Fig.
V11R Rising Threshold Voltage
(pin11)=15to 50V= 5.3V
Vref
Vref
Vref
V11F Falling Threshold Voltage
(pin11)=15to 50V= 5.3V
4.77 Vref
Vref
V5H Delay High Threshold
Voltage=15to 50V
V11 =V14
4.95 5.1 5.25 V 7D
V5L Delay Low Threshold
Voltage=15to 50V
V11 =V14 V3= 5.3V 1.1 1.2 V 7D
–I5SO Delay Source Current V3= 5.3V;V5 =3V 40 60 80 μA7D
I5SI Delay Sink Current V3= 4.7V;V5 =3V 10 mA 7D
V4S Out Saturation Voltage I4= 15mA;S1=B= 4.7V
0.4 V 7D Output Leak Current V4= 50V;S1=A= 5.3V
100 μA7D
V3R Rising Threshold Voltage V11 =V14 4.95 5.1 5.25 V 7D
V3H Hysteresys 0.4 0.5 0.6 V 7D Input Bias Current 1 3 μA7D
Figure5: Test and Evaluation Board Circuit
TYPICAL PERFORMANCES (using evaluation board):= 83%(Vi= 35V;Vo =VREF ;Io =5A; fSW= 200KHz) RIPPLE= 30mV(at 5A) with output filter capacitorESR≤ 60mΩ
Line regulation= 5mV(Vi=15to 50V)
Load regulation= 15mV(Io=2to 5A)
For component values, referto testcircuit part list.
L4975A
8/21
PARTS LIST= 30KΩ C1,C2= 3300μF 63VL EYF (ROE= 10KΩ C3,C4,C5,C6= 2.2μF= 15KΩ C7= 390pF Film= 16KΩ C8= 22nF MKT 1817 (ERO) =22Ω 0,5W= 4K7 C9= 2.2nF KP1830 =10Ω C10= 220nF MKT= see tab.A C11= 2.2nF MP1830= OPTION **C12,C13,C14= 220μF 40VL EKR
R10= 4K7 C15 =1μF Film
R11 =10Ω= MBR 760CT(or 7.5A/60Vor equivalent)= 80μH core 58930 MAGNETICS TURNSØ 1.1mm (AWG17)
COGEMA 9491782 capacitorsin parallelto increase inputRMS current capability3 capacitorsin parallelto reduce total outputESR
TableB
SUGGESTED BOOTSTRAPCAPACITORS
Operating Frequency Bootstrap Cap.c10= 20KHz ≥680nF= 50KHz ≥470nF= 100KHz ≥330nF= 200KHz ≥220nF= 500KHz ≥100nF
Figure 6a: P.C.Board (componentsside) and ComponentsLayoutof Figure5 (1:1 scale).
TableA R9 R7
12V
15V
18V
24V
4.7kΩ
4.7kΩ
4.7kΩ
4.7kΩ
6.2kW
9.1kΩ
12kΩ
18kΩ
L4975A
9/21
Figure7: DC Test Circuits
Figure 6b: P.C. Board (Back side) and Components Layoutof the Circuitof Fig.5. (1:1 scale)
L4975A
10/21
Figure 7A
Figure 7B
L4975A
11/21
