L4973D-3.3-L4973V-3.3-L4973V5.1. Fast Delivery |IC PHOENIX CO.,LIMITED

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L4973D-3.3-L4973V-3.3-L4973V5.1.
3.5A STEP DOWN SWITCHING REGULATOR
L4973V3.3- L4973V5.1
L4973D3.3- L4973D5.1
3.5A STEP DOWN SWITCHING REGULATOR
UPTO3.5ASTEPDOWNCONVERTER
OPERATING INPUT VOLTAGE FROM 8V TO
55V
3.3V AND 5.1V (±1%) FIXED OUTPUT, AND
ADJUSTABLE OUTPUTS FROM: TO 50V (3.3V type)
5.1V TO 50V (5.1 type)
FREQUENCY ADJUSTABLE UP TO 300KHz
VOLTAGEFEED FORWARD
ZERO LOAD CURRENT OPERATION (min
1mA)
INTERNAL CURRENT LIMITING (PULSE BY
PULSE AND HICCUPMODE)
PRECISE 5.1V (1.5%) REFERENCE VOLT-
AGE EXTERNALLY AVAILABLE
INPUT/OUTPUT SYNCHRONIZATION FUNC-
TION
INHIBIT FOR ZERO CURRENT CONSUMP-
TION (100μA Typ.at VCC= 24V)
PROTECTION AGAINST FEEDBACK DIS-
CONNECTION
THERMAL SHUTDOWN
OUTPUT OVERVOLTAGE PROTECTION
SOFT START FUNCTION
DESCRIPTION
The L4973isa step down monolithic power
switching regulator delivering 3.5Aat fixed volt-
agesof 3.3Vor 5.1V and usinga simple external
divider output adjustable voltageupto 50V.
Realizedin BCD mixed technology, the device
L4973CC (8Vto 55V)IN C2
ROSCOSC D1OUT
VO(3.3Vor 5.1V)
CBOOT
4,5,6,
13,14,15
D97IN554A
RCOMP COMPSS16
TYPICAL APPLICATION CIRCUIT (POWERDIP)
POWERDIP (12+3+3) SO20(12+4+4)
ORDERING NUMBERS:
L4973V3.3 (Powerdip)
L4973D3.3 (SO20)
L4973V5.1 (Powerdip)
L4973D5.1 (SO20)
MULTIPOWER BCD TECHNOLOGY
uses an internal power D-MOS transistor (witha
typical Rdsonof 0.15ohm)to obtain very high effi-
ciency and very fast switching times.
Switching frequencyupto 300KHz are achievable
(the maximum power dissipationof the packages
mustbe observed). wide input voltage range between 8Vto 55V
and output voltages regulated from 3.3Vto 40V
cover the majorityof the today applications.
Featuresof this new generationof DC-DC con-
verter includes pulseby pulse current limit, hiccup
mode for output short circuit protection, voltage
feed forward regulation, soft start, input/output
synchronization, protection against feedback loop
disconnection, inhibit for zero current consump-
tion and thermal shutdown.
Packages available arein plastic dualin line, DIP- (12+3+3) for standard assembly, and SO20
(12+4+4)for SMD assembly.
PIN CONNECTIONS (Top view)
OSC
OUT
OUT
GND
GND
VCC
GND
VCC
BOOT INH
VFB
COMP
GND
GND
GND
V5.1
SYNC18
D94IN162A
POWERDIP (12+3+3)
OSC
OUT
OUT
GND
GND
GND
GND
VCC
VCC
VFB
COMP
GND
GND
GND
GND
V5.1
SYNC1
BOOT INH
D94IN163A
SO20 (12+4+4)
VREF
GOOD 5.1V
COMP
VFB
SYNC
BOOT
DRIVER
HICCUP CURRENT
LIMITING
INTERNAL
REFERENCE
INH
ZERO CURRENT
INHIBIT
D94IN161B
3.3V
V5.1
E/A
SOFT
START
5.1V
3.3V
THERMAL
SHUTDOWN
INTERNAL
SUPPLY 5.1V
PWM
CURRENT
LIMITING
CBOOT
CHARGE
OSCILLATOR
OUTOUTGNDOSC
VCC VCC
17(19)
11(12)
12(13)
18(20)
1(1) 2(2) 3(3)
9(10)
8(9)7(8)16(18)10(11)
4,5,6,13,14,15
(4,5,6,7,14,15,16,17)
Pinx= Powerdip
Pin(x) =S020
BLOCK DIAGRAM
L4973V3.3- L4973V5.1- L4973D3.3- L4973D5.1
PIN FUNCTIONS
Powerdip SO20 NAME DESCRIPTION 12 COMP E/A outputtobe usedfor frequency compensation 11 INH A logic signal (active high) disablesthe device (sleep mode operation).not usedit mustbe connectedto GND;if floatingthe deviceis disabled. 10 BOOT A capacitor connected between thispin andthe output allowsto drivethe
internal D-MOS. 20 SYNC Input/Output synchronization.
7,8 8,9 Vcc Unregulated DC input voltage
2,3 2,3 OUT Stepdown regulator output. 13 VFB Stepdown feedback input. Connecting the output directlyto thispin resultsan output voltageof 3.3Vfor the L4973V3.3 and 5.1V.An external
resistive divideris requiredfor higher output voltages. Foroutput voltage
less than 3.3V, seenote** and Figure32. 18 V5.1 Reference voltage externally available.
4,5,6
13,14,15
4,5,6,7
14,15,16,17
GND Signal ground 1 OSC An external resistor connected between the unregulated input voltage and
Pin1 anda capacitor connected from Pin1to ground fixesthe switching
frequency. (Line feed forwardis automatically obtained)
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
DIP-18 S0-20
V7,V8 V9,V8 Input voltage 58 V
V2,V3 V2,V3 Output DC voltage
Output peak voltageatt= 0.1μs f=200KHz
I2,I3 I2,I3 Maximum output current int. limit.
V9-V8 V10-V8 14 V V10 Bootstrap voltage 70 V
V11 V12 Analogs input voltage (VCC= 24V) 12 V
V17 V19 Analogs input voltage (VCC= 24V) 13 V
V12 V13 (VCC= 20V) 6
V18 V20 (VCC= 20V) 5.5
V10 V11 Inhibit Vcc
Ptot Power dissipationa Tpins≤ 90°C
(Tamb =70°Cno copper area)
(Tamb =70°C 4cm copper areaon PCB)
DIP
12+3+3
Power dissipationa Tpins =90°C SO20 4 W
TJ,TSTG Junction and storage temperature -40to 150 °C
THERMAL DATA
Symbol Parameter Powerdip SO20 Unit
Rth(j-pin) Thermal Resistance Junctiontopin Max. 12 15 °C/W
Rth(j-amb) Thermal Resistanceto Ambient Max. 60(*) 80(*) °C/W
(*)Package mountedon board.
L4973V3- L4973V5- L4973D3- L4973D5
ELECTRICAL CHARACTERISTICS( Referto the test circuit,VCC= 24V;Tj =25°C, COSC= 2.7nF;
ROSC= 20KΩ; unless otherwise specified)•= specificationsreferredtoTJ from0to 125°C.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DYNAMIC CHARACTERISTICS
Input Voltage Range(*) VO =VREFto 40V;IO =3.5A • 855 V
Output Voltage
L4973V5.1=1A 5.05 5.1 5.15 V
IO= 0.5Ato3.5A 5.00 5.1 5.20 V
VCC=8Vto 55V • 4.95 5.1 5.25 V
Output Voltage
L4973V3.3=1A 3.326 3.36 3.393 V
IO= 0.5Ato3.5A 3.292 3.36 3.427 V
VCC=8Vto 40V • 3.26 3.36 3.46 V
RDSON VCC= 10.5V 0.15 0.22 Ω
IO=3.5A • 0.35 Ω
Maximum Limiting Current VCC=8V to55V • 4 4.5 5.5 A Efficiency VO= 5.1V;IO =3.5A 90 %= 3.3V;IO =3.5A 85 %
Switching Frequency • 90 100 110 KHz
Supply Voltage Ripple
Rejection =VCC +2VRMS =Vref;IO=1A; fripple= 100Hz dB
Δfsw Switching Frequency Stability
vs, Supply Voltage
VCC=8Vto 55V 2 5 %
REFERENCE SECTION
Reference Voltage 5.025 5.1 5.175 V
Iref=0to 20mA;
VCC=8to 55V • 4.950 5.1 5.250 V
Line Regulation Iref= 0mA;
VCC=8to 55V
510 mV
Load Regulation Vref=0to 5mA;
VCC=0to 20mA
Short CircuitCurrent 30 65 100 mA
SOFT START
Soft Start Charge Current 30 45 60 μA
Soft Start Discharge Current 15 22 30 μA
INHIBIT
High Level Voltage • 3.0 V
Low Level Voltage • 0.8 V
Isource High Level VINH =3V • 10 16 50 μA
Isource Low Level VINH= 0.8V • 10 15 50 μA CHARACTERISTICS
Total OperatingQuiescent
Current
Duty Cycle= 50% 4 6 mA
Quiescent Current Duty Cycle=0 2.7 4 mA
Total stand-by quiescent
current
VCC= 24V; VINH=5V 100 200 μA
VCC= 55V; VINH=5V 150 300 μA
ERROR AMPLIFIER
High Level Output Voltage 11.0 V
Low Level Output Voltage 0.65 V
Source Bias Current 1 2 3 μA
Source Output Current 200 300 600 μA
L4973V3.3- L4973V5.1- L4973D3.3- L4973D5.1
Sink Output Current 200 300 μA
Supply Voltage Ripple
Rejection
VCOMP= VFB
CREF =4.7μF 1-5mA load
current 80 dB Open Loop Gain RL = ∞ 50 60 dB
Transconductance Icomp= -0.1to 0.1mA;
Vcomp =6V
2.5 mS
OSCILLATOR SECTION
Ramp valley 0.78 0.85 0.92 V
Ramp peak VCC=8V 1.9 2.1 2.3 V
VCC= 55V 9 9.6 10.2 V
Maximum Duty Cycle 95 97 %
Maximum Frequency Duty Cycle= 0%; ROSC=
13KΩ;COSC= 820pF;
500 KHz
SYNC FUNCTION
High Input Voltage VCC=8V to55V 3.5 V
Low Input Voltage VCC=8V to55V 0.9 V
Slave Sink Current 0.15 0.25 0.45 mA
Master Output Amplitude Isource= 3mA 4 4.5 V
Output Pulse Width no load, Vsync= 4.5V 0.20 0.35 μs
(*)Pulse testingwithalow duty cycle.
(**) The maximum power dissipationof thepackage mustbe observed.
ELECTRICAL CHARACTERISTICS (continued)
L4973
VCC C2 C4 C5 D1x C12C8
4,5,6
13,14,15
7,811 2,3
D97IN515B
(DIP18)
C1=1000μF/63V
C2=220nF/63V
C3=470nF
C4=1μF/50V
C5=220pF
C6=22nF
C7=2.7nF
C8=220nF/63V
C0=100μF/40V(C9,C10,C11)
C12=Optional (220nF)
L1=150μHKOOLμ 77310-40 Turns- 0.9mm
R1=9.1K
R2=20K
D1=GI SB560
VO(V) R3(KΩ) R4(KΩ)
L4973 V3.3
VO(V) R3(KΩ) R4(KΩ)
L4973 V5.1
Figure1. Evaluation Board Circuit
L4973V3- L4973V5- L4973D3- L4973D5
Output Voltage Output
Ripple Efficiency Line Regulator= 3.5A VCC=8to 50V
Load Regulator
VCC =35VIO=1to 3.5A
3.3V 20mV 81.5 (%) 3mV 6mV
5.1V 20mV 86.7 (%) 3mV 6mV
12V 30mV 93.5 (%) 3mV (VCC =15to 50V) 4mV
TypicalPerformance (Using EvaluationBoard) fsw= 100kHz
Figure 1a: Evaluation Board (Components Side)
Figure 1b: Evaluation Board (Solder Side)
L4973V3.3- L4973V5.1- L4973D3.3- L4973D5.1
L4973V3.3
VCC C2 C4 C5 D1
3x C12
4,5,6
13,14,15
7,8 10 18 9
INH SYNC 2,312
D97IN664A
Figure 1d: Application Circuit (see fig.1 part list)
L4973V5.1
VCC C2 C4 C5 D1x C12
4,5,6
13,14,15
7,8 10 18 9
INH SYNC 2,312
D97IN665A
Figure 1c: Application Circuit (see fig.1 part list) 1020 304050 VCC(V)
Ibias
(mA)
Tamb=25°C DC
D97IN633A
100KHz-R2=20K
C7=2.7nF
200KHz-R2=22K
C7=1.2nF
0Hz
Figure2: QuiescentDrain Current vs. Input
Voltage (0% Duty Cycle)
-50 0 50 100 Tj(°C)
Ibias
(mA)
D97IN634
100KHz-R2=20K
C7=2.7nF
200KHz-R2=22K
C7=1.2nF
0Hz
0%DC
VCC=35V
Figure3: QuiescentDrain Current vs. Junction
Temperature
L4973V3- L4973V5- L4973D3- L4973D5
1020304050 VCC(V)Ibias
(μA)
D97IN635A
25°C
125°C
Vinh=5V
Figure4: Standby Drain Current vs. input
Voltage
-40 0 40 80 Tj(°C)-20 20 60 1005.0
VREF
(V)
D97IN637
Vcc=35V
Pin16
Figure5: ReferenceVoltage vs. Junction
Temperature (Pin 16) 1020 3040 50 VCC(V)5.0
VREF
(V)
D97IN636A
Tj=25°C
Pin16
Figure6: Reference Voltage vs. Input Voltage
(Pin 16) 102030 4050 IREF(mA)
VREF
(V)
D97IN638
Tj=25°C
Vcc=10V
Vcc=40V
Figure7: ReferenceVoltage vs. Reference Input
Current 15 Vinh(V)105-50
Iinh
(μA)
D97IN651
Tj=0°C
Tj=25
Tj=125°C
Vcc=35V
Pin10
Figure8: Inhibit Current vs. Inhibit Voltage
(Pin 10) 1020304050 VCC(V)5.06
VO
(V)
D97IN639A
Tj=25°C
Tj=125°C=1A
Figure9: Line Regulation (see fig.1)
L4973V3.3- L4973V5.1- L4973D3.3- L4973D5.1

Partno	Mfg	Dc	Qty	Available	Descript
L4973D-3.3 \|L4973D33	ST	N/a	11	avai	3.5A STEP DOWN SWITCHING REGULATOR
L4973V-3.3 \|L4973V33	STM	N/a	600	avai	3.5A STEP DOWN SWITCHING REGULATOR
L4973V5.1. \|L4973V51	ST	N/a	320	avai	3.5A STEP DOWN SWITCHING REGULATOR