L4956 ,5A LOW DROP LINEAR REGULATORABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV ,V Supply Input Voltage 7 VPW SIGADJ pin -0.3 ..
L4957AD1.5TR ,UP TO 5A ULTRA LOW DROP OUPUT LINEAR REGULATORAPPLICATIONSL4957AV1.5 L4957AD1.5L4957AV1.8 L4957AD1.8M ..
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L4956
5A LOW DROP LINEAR REGULATOR
L4956 LOW DROP LINEAR REGULATOR
SPLITTED SUPPLY VOLTAGE FOR IM-
PROVED EFFICIENCY:
-VPW: 3V MIN. POWER SUPPLY VOLTAGE
-VSIG: 4.5VMIN. SIGNALSUPPLYVOLTAGE OUTPUT CURRENT
FASTLOAD TRANSIENT RESPONSE
0.75V TYP. DROP OUT VOLTAGE AT5A
INHIBITWITHZEROCURRENT COMSUMPTION
POWER GOOD
SHORT CIRCUIT PROTECTION
THERMAL SHUTDOWN
HEPTAWATT PACKAGE
APPLICATIONSPENTIUM ANDPOWER PC SUPPLIES
LOW COST SOLUTION FOR 3.3V TO 1.5V
CONVERSION
SUITABLE FOR APPLICATIONS WITH
STAND BY FEATURE
DESCRIPTIONThe L4956isan adjustablemonolithic linear regu-
lator designedto satisfy very heavy load transient
and efficient power conversion from 3.3Vto 1.26V
and lower,upto 5A.
Designedin BCDII technology,it usesa charge
pump techniqueto havea proper internal N-chan-
nel gate drive. The signal supply voltage input
VSIG can operate from 4.5V upto an absoluteof and the power supply voltage input VPW can
opearte from 3V minto an absoluteof 7V. An
RDSONof 150mV givesa voltage dropof 750mV 5Aof load current.
Very fast load transients and ±1%of reference
voltage precision makes this device suitable for
supplying last micrprocessors generation and low
voltage logics.
The Heptawatt package enriches the device with
auxiliary functions like power good and inhibit.
March 1998
HEPTAWATT
ORDERING NUMBER: L4956
MULTIPOWER BCD TECHNOLOGYVPWSIG
D96IN374B OUT ADJ
GND
L4956VPW=3.3VbusSIG=
5Vbus
INH PG
TYPICAL APPLICATION1/8
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value UnitVPW,VSIG Supply InputVoltage 7 V
ADJpin and INH pins
-0.3to4
0to VSIG
PTOT Power Dissipation@ Tamb =50°C
Power Dissipation@ Tcase =90°C
Tst,Ti Storage Temperature -40to +150 °C
PIN FUNCTIONS
No. Name Function1VPW Unregulated power inputvoltage; thispin mustbe bypassed witha capacitor larger than 10μF.
2VSIG Unregulated signal input voltage thispin hastobeby passed witha minimum capacitorof 0.1μF. INH TTL-CMOS input.A logic levelon this input disable the device.An internal pull-down insures insures
full functionally evenifthepinis open. GND Ground. ADJ The outputis connected directlyto this terminalfor 1.26V operationvia dividerfor higher voltages. PG Open drain output, thispinis low whenthe outputvoltageis lower than 90%, otherwiseis high. OUT Regulated output voltage.A minimum bypass capacitorof 22μFis requiredto insure stability. OUT
ADJ
GND
INH
VSIG
VPW
D96IN373tab connectedtopin4
PIN CONNECTION (Top view)
VPW
PRE
REGULATOR
VREF=
1.26VE/A
OUT
ADJ
GND PG D96IN372A4
INHIBIT
ACTIVE HIGH
1.26V
INH
VPW
10μF
CURRENT
LIMITATION
THERMAL
SHUTDOWN
FOLDBACK
BUFFER
CHARGE
PUMP
POWER
DMOS
150mΩ0.9VREF 22μF
VOUT
VSIG 2
VSIG
BLOCK DIAGRAM
L49562/8
ELECTRICAL CHARACTERISTICS(Tj =25°C, unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. UnitVPW PowerOperating Supply Voltage 3 6.5 V
VSIG Signal Operating Supply Voltage 4.5 6.5 V
VOUT Output Voltage (1) 0
4.5V< VSIG< 6.5V; 0.1A1.240 1.260 1.280 V
3V0.1A1.224 1.260 1.296 V
ΔVOUT Line regulation (1) 3V< VPW< 5.5V;IO= 10mA
4.5V< VSIG<6.5V
0.5 3 mV
ΔVOUT Load regulation (1) VPW= 3.3V; VSIG =5V
0.1ADrop-out Voltage IO =5A= 5A,Tj= 125°C
1.5 Current Limiting 0Short Circuit Current VO= 0V,04.5V< VSIG <6.5V
1.5 3 mA
StandBy Currentatpin VSIG INH= HIGH VSIG=5V 100 150 μA
Inhibit Threshold 0Inhibit Histeresys 0.2 V
Inhibit Bias Sink Current 5 10 μA
Power Good Threshold 0.9x
VOUT
Power Good Saturation I6= 4mA 0.1 0.4 V
Power Good Histeresys 0.2 V
(1)Outputvoltage connectedto ADJ.
THERMAL DATA
Symbol Parameter Value Unit
Rthj-pins Thermal Resistance Junction-case 2.5 °C/W
Rthj-amb Thermal Resistance Junction-ambient 50 °C/W
Thermal Shutdown Typ. 150 °C
Thermal Hysteresis Typ. 20 °C
L4956
3/8
Power
Dissipation
Limit 1234 567 80
(Vpw- Vout) [V] utputC urrent [A]
Vpw>3Vsig> 4.5V= 125°C= 25°C
Pdmax=40W
Current Limitation
Rdson
limit Operating Area= 70°C
Pdm ax=22W
Figure1. DC Operating Area.
-40 0 40 80 120 1601.24
1.28 [°C]
Vout [V]
Vpw= 3.3V
Vsig=5V
Iout= 10mA
Figure2. Output Voltage Stability vs.
Junction Temperature 123 45-5
Iout [A]
utput
Voltage
Deviation ulsed tecnique has been usedw= 3.3V
Vsig=5V
Vout= Vadj=25°C
Figure3. Load Regulation. 23 4 5 6
Iout[A]
Minimum
Vpw
Vout
Voltage
[V]= 125°C=25°C=-40°C
Pulsed technique has been used
Figure4. Dropout Voltage.
-40 -20 0 20 40 60 80 100 120 140 1600 [ºC]
Output Current [A]
(Vpw -Vout)>2V
Pulsed tecnique has been used
Figure5. Maximum Output Current vs.
Junction Temperature
-40 -20 0 20 40 60 80 100 120140 160
1.8 [°C] [mA]SIG =6.5V
Iout=10mAto 5AV
Figure6. Quiescent Currentat pin VSIG vs.
Junction Temperature.
L4956
4/8
23 45670VSIG [V] [mA]=10mAto 5A= 25°C
Figure7. Quiescent Currentat pin VSIG vs.
Signal InputVoltage. 4.5 5 5.5 6 6.5 70050SIG [V][μA]=25°CV< VPW<6.5V
Figure8. Stand-ByCurrentat pin VSIGvs.Signal
InputVoltagewithINH= LOGICHIGH
VADJ
0.9 VADJ
hyst =200mV
HighLow Low
D96IN364B
VOUT=VADJ(R1+R2)/R2
Figure9. PowerGood Function
VINH
Vref= 1.26V
hyst= 200mV
regulator
OFF
regulator
regulator
D96IN365A
Figure 10. Inhibit Function
L4956
5/8
LOAD TRANSIENT RESPONSE
Figure 11.
Vout
50mV/div
CH1gnd
0.5A
CH2gnd
Iout
2A/div 5μs/div
Figure 12.
Vout
50mV/div
CH1gnd 5μs/div
Figure 13.
Vout
50mV/div
CH1gnd =100μs/div
0.5A
CH2gnd
Iout
2A/div
0.5A
CH2gnd
Iout
2A/div
C1,C2
470μF
Panasonic
HFQ
R4
24Ω
R5
126Ωto C9
100μF/10V
AVX TPS each
C10to C15
1μF
AVX X7R each
VOUT=1.5VVIN=3.3V
VPW
GND
INH
OUT
ADJL4956
D97IN593SIG
C16
220nFSIG =5V
Figure 14. Load transient test circuit.
Test conditions:
VPW= 3.3V; VSIG =5; Vout= 1.5V; Load Transient
from 0.5Ato 5A;
dlout= 20A/μs;Tj= 25°C
L4956
6/8