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L4923
WITH RESET AND INHIBIT 5V.1A VERY LOW DROP REGULATOR
L4923June 2000
WITH RESET AND INHIBIT
5V–1A VERY LOW DROP REGULATOR VERY LOW DROP (max. 0.9Vat 1A) OVER
FULL OPERATING TEMPERATURE RANGE40/+ 125 °C). LOW QUIESCENT CURRENT (max70 mAatA) OVER FULLT RANGE. PRECISEOUTPUTVOLTAGE(5V±4%) OVER
FULLT RANGE. POWER ON-OFF INFORMATION WITH SET-
TABLEDELAY. INHIBIT FOR REMOTE ON-OFF COMMAND
(active high). LOAD STANDBY CURRENT. LOAD DUMP AND REVERSE BATTERY PRO-
TECTION. SHORT CIRCUIT PROTECTION. THERMAL SHUTDOWN
DESCRIPTIONThe L4923isa highcurrentmonolithicvoltageregu-
lator with very low voltagedrop (0.70V maxat1A, =25 °C).
The deviceis internally protected against load
dumps transientof+ 60V, input overvoltage, re-
verse polarity,overheatingand output shortcircuit:
thankstothesefeaturesthe L4923is very suitedfor
the automotiveand industrial applications.
The reset functionis very usefulfor poweroff and
poweron informationwhen supplyinga microproc-
essor.
The inhibit function reduces drastically the con-
sumptionwhenno loadcurrentisrequired: typically
the standbycurrent valueis 300 μA.
Heptawatt
ORDERING NUMBER: L4923
BLOCK DIAGRAM1/6
PIN CONNECTION
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit DC Input Voltage 35 V DC Reverse Voltage –18 V Positive Load Dump Protection(t= 300ms) 60 V Junction Temperature range –40to 150 °C
Top Operating Temperature Range –40to 125 °C
Tstg Storage Temperature Range –55to 150 °C
THERMAL DATA
Symbol Parameter Value UnitRth j-case Thermal Resistance Junction Case 4 °C/W
Figure1: ApplicationCircuit.
(*) RECOMMENDEDVALUE:C0 =47μF, ESR <10 Ω,(Iout>10 mA) OVER FULL Trange.
Note:Thecircuit isESD protected accordingto MIL-STD-883C
L49232/6
ELECTRICAL CHARACTERISTICS (Vi= 14. 4V,– 40°C≤TJ≤+ 125°C unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit Operating Input Voltage (*) Note1 6 26 V Output Voltage Io= 0mAto1A =25°C
ΔVLine Line Regulation Vi=6to 26V; IO= 10mA 5 25 mV
SVR Supply Voltage Rejection Io= 700mA= 120Hz;Co =47μF= 12Vdc +5Vpp dB
ΔVLOAD Load Regulation Io= 10mAto1A 15 50 mV –Vo Dropout Voltage TJ =25°C,IO =1A 0.45 0.70 V
Over FullT,Io=1A 0.90 V Quiescent Current Io= 10mA =1A
Active High Inhibit
ISC Short Circuit Current 1.8 A
SVR Supply Volt. Rej. Io= 350mA;f= 120Hz= 100μF;Vi= 12V± 5Vpp 60 dB Rset Output Saturation Voltage 1.5V
VRT peak Power On-Off Resetout Peak
Voltage
1KΩ Reset Pull-uptoVO 0.65 1.0 V Reset Output Leakage Current
(high level)in Regul. =5V μA Reset Pulse Delay Time CD= 100nF 20 ms
VRthOFF Power OFFVo Threshold Vo@ Reset outHtoL
Transition;TJ =25°C
–40°C≤TJ≤+ 125°C
4.7 –0.15 V
IC6 Delay Capacitor Charging
Current (current generator) =3V 20 μA
VRthON Power ONVo Threshold Vo@ Reset outLtoH
Transition
VrthOFF 0.03V–
0.04V Delay Comparator Threshold Resetout=”1”HtoL Transition 3.2 3.8 V
Resetout=”0”LtoH Transition 3.7 4 4.4 V
V6H Delay Comparator Hysteresis 500 mV
VInhL Low Inhibit Voltage 0.5 V
VInhH High Inhibit Voltage 2.0 V
IInhL Low Level Inhibit Current VInhL= 0.4V –40 –10 μA
(*)Note1: Thedeviceisnotoperating within therange:26VEXTERNAL COMPENSATION
Sincethe purpose ofa voltageregulatoris tosupply fixed output voltagein spiteof supply and load
variations,the openloop gainof the regulator must very highat low frequencies.Thismaycausein-
stabilityasa resultof the various poles presentin
the loop. To avoid this instability dominant pole
compensationisused toreducephaseshifts dueto
other polesat the unity gain frequency. The lower
thefrequencyof theseother poles,thegreatermust the capacitor usedto create the dominant pole
for the same DC gain.
Where the output transistorisa lateral PNP type
thereisa polein the regulation loopata frequency
too lowtobe compensatedbya capacitor wich can integrated.An external compensationis there-
fore necessarysoa very high value capacitor must connectedfrom the outputto ground.
The parassiticequivalentseriesresistanceoftheca-
pacitorusedaddsa zeroto the regulationloop. This
zero may compromise the stabilityof the system
sinceits effect tendsto cancel the effectof the pole
added.In regulatorsthis ESR mustbe less than 3Ω
and the minimum capacitor valueis 47μF.
L4923
3/6
The operating principleof the voltage regulatoris
basedon thereference,theerroramplifier,thedriver
and the power PNP. This stage uses an Isolated
CollectorVerticalPNP transistorwhich allowsto ob-
tain very lowdropoutvoltage (typ. 450 mV) andlow
quiescentcurrent(IQ= 20mA typicallyatIO=1 A).
Thanksto these features the deviceis particularly
suited when the power dissipation mustbe limited
as,for example,in automotiveor industrialapplica-
tions suppliedby battery.
The three gain stages (operational amplifier, driver
and power PNP) require the external capacitor
(COmin =22 μF)to guarantee the global stabilityof
the system.
The antisaturationcircuit allowsto reducedrastically
the current peak which takes place during the start
up.
The reset functionis LOW active when the output
voltage levelis lower than the reset threshold volt-
age VRth (typ.value:VO -150mV).When theoutput
voltageis higherthanVRth thereset becomesHIGH
aftera delaytimesettablewith theexternalcapacitor
Cd. Typicallytd= 20 ms, Cd= 0.1 μF. The reset
threshold hysteresis improves the noise immunity
allowingto avoid false switchings. The typical reset
outputwaveformis shownin fig.2.
TheinhibitcircuitacceptsstandardTTL inputlevels:
thisblockswitchesoffthevoltageregulatorwhen the
input signalis HIGH and switchesonit when thein-
put signalis LOW. Thanksto inhibitfunctionthecon-
sumptionis drasticallyreduced(650μA max) when load currentis required.
Figure2: Typical Reset OutputWaveform.
FUNCTIONAL DESCRIPTION
L4923
4/6
HeptawattV
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX. 4.8 0.189 1.37 0.054 2.4 2.8 0.094 0.110 1.2 1.35 0.047 0.053 0.35 0.55 0.014 0.022 0.7 0.97 0.028 0.038 0.6 0.8 0.024 0.031 0.9 0.035 2.34 2.54 2.74 0.095 0.100 0.105 4.88 5.08 5.28 0.193 0.200 0.205 7.42 7.62 7.82 0.295 0.300 0.307 10.4 0.409 10.05 10.4 0.396 0.409 16.7 16.9 17.1 0.657 0.668 0.673 14.92 0.587 21.24 21.54 21.84 0.386 0.848 0.860 22.27 22.52 22.77 0.877 0.891 0.896 1.29 0.051 2.6 2.8 3 0.102 0.110 0.118 15.1 15.5 15.8 0.594 0.610 0.622 6 6.35 6.6 0.236 0.250 0.260 0.2 0.008 2.55 2.8 3.05 0.100 0.110 0.120 4.83 5.08 5.33 0.190 0.200 0.210 40° (typ.)
Dia 3.65 3.85 0.144 0.152
Dia.H2
GG1 G2
HEPTAMEC
OUTLINE AND
MECHANICAL DATA
L4923
5/6
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L4923
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