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JM38510/75302BCA
Dual D-Type Positive Edge-Triggered Flip-Flop
54AC74/54ACT74
Dual D-T ype Positive Edge-Triggered Flip-Flop
General DescriptionThe ’AC/’ACT74isa dual D-type flip-flop with Asynchronous
Clear and Set inputs and complementary (Q,Q) outputs.
Informationat the inputis transferredto the outputson the
positive edgeofthe clock pulse. Clock triggering occursata
voltage levelofthe clock pulse andisnot directly relatedto
the transition timeofthe positive-going pulse.Afterthe Clock
Pulse input threshold voltage has been passed, the Data
inputis locked out and information presentwillnotbe trans-
ferredto the outputs untilthe next rising edgeof the Clock
Pulse input.
Asynchronous Inputs:
LOW inputtoSD (Set) setsQto HIGH level
LOW inputtoCD (Clear) setsQto LOW level
Clear and Setare independentof clock
Simultaneous LOWonCD andSD makes bothQ andQ
HIGH
Features ICC reducedby 50% Output source/sink24 mA ’ACT74 has TTL-compatible inputs Standard Microcircuit Drawing (SMD) ’AC74: 5962-88520 ’ACT74: 5962-87525 54AC74 now qualifiedto 300Krad RHA designation,
referto the SMDfor more information
Logic SymbolsIEEE/IEC
Pin Names Description
D1,D2 Data Inputs
CP1,CP2 Clock Pulse Inputs
CD1,CD2 Direct Clear Inputs
SD1,SD2 Direct Set Inputs
Q1,Q1,Q2,Q2 Outputs
July 2003
54AC74/54ACT74
Dual
D-T
ype
Positive
Edge-T
riggered
Flip-Flop
