SN54HCT138J ,3-Line To 8-Line Decoders/Demultiplexersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HCT139J , DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SN54HCT14J , HEX SCHMITT-TRIGGER INVERTERS
SN54HCT157J , QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SN54HCT240J ,Octal Buffers And Line Drivers CMOS Logic With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HCT244J ,Octal Buffers And Line Drivers With 3-State OutputsElectrical Characteristics....... 512.2 Related Links.. 126.6 Switching Characteristics: C = 50 pF. ..
SN74F373NSR ,Octal D-type transparent latcheslogic diagram (positive logic)11OE ENOE11LE C111LE3 21D 1D 1Q4 5C12D 2Q21Q7 633D 3Q 1D 1D8 94D 4Q13 ..
SN74F374 ,Octal D-Type Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F374DBLE ,Octal D-Type Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)11OEOEEN1111CLK C1CLKC121Q33 21D 1D1D 1D 1Q4 52D 2Q7 63D 3Q8 94D 4Q12 ..
SN74F374DBR ,Octal D-Type Edge-Triggered D-Type Flip-Flops With 3-State Outputs SDFS077A − D2932, MARCH 1 ..
SN74F374DBR ,Octal D-Type Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)11OEOEEN1111CLK C1CLKC121Q33 21D 1D1D 1D 1Q4 52D 2Q7 63D 3Q8 94D 4Q12 ..
SN74F374DBR ,Octal D-Type Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)11OEOEEN1111CLK C1CLKC121Q33 21D 1D1D 1D 1Q4 52D 2Q7 63D 3Q8 94D 4Q12 ..
JM38510/65852BEA-SN54HCT138J-SNJ54HCT138J
3-Line To 8-Line Decoders/Demultiplexers
±4-mA Output Drive at 5 V
Incorporate Three Enable Inputs to SimplifyCascading and/or Data ReceptionG2A
G2BANCY5Y0
GND
SN54HCT138 ...FK PACKAGE
(TOP VIEW)NC − No internal connection
G2A
G2B
GND
VCC
SN54HCT138 ...J OR W PACKAGE
SN74HCT138... D, N, NS, OR PW PACKAGE
(TOP VIEW)
description/ordering informationThe ’HCT138 devices are designed for high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders can
minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable
circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical
access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
