SN54HC273J ,Octal D-type Flip-Flops With ClearMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN54HC27J ,Triple 3-Input Positive-NOR Gates SN54HC27, SN74HC27 TRIPLE 3-INPUT POSITIVE-NOR GATES SCLS088D – DECEMBER 1982 – REVISED AUGUST 200 ..
SN54HC27J ,Triple 3-Input Positive-NOR Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC32J ,Quadruple 2-Input Positive-OR GatesElectrical Characteristics...... 512.3 Receiving Notification of Documentation Updates 136.7 Switch ..
SN54HC365J ,Hex Bus Drivers With 3-State Outputs SCLS308D − JANUARY 1996 − REVISED ..
SN54HC367J ,Hex Bus Drivers With 3-State Outputs SCLS309D − JANUARY 1996 − REVISED ..
SN74F260D ,Dual 5-input positive-NOR gates/productcontent for the latest availabilityinformation and additional product content details.TBD: ..
SN74F260DR ,Dual 5-input positive-NOR gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F260N ,Dual 5-input positive-NOR gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F27 ,Triple 3-input positive-NOR gateslogic diagram, each gate (positive logic)1B1Y131CA3YB2A46 C2B2Y52C93A1083B3Y113C†This symbol is in ..
SN74F27D ,Triple 3-input positive-NOR gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F27DR ,Triple 3-input positive-NOR gates SN54F27, SN74F27 TRIPLE 3-INPUT POSITIVE-NOR GATES SDFS042A – MARCH 1987 – REVISED OCTOBER 1993SN5 ..
JM38510/65601BRA-SN54HC273J-SNJ54HC273FK-SNJ54HC273J-SNJ54HC273W
Octal D-type Flip-Flops With Clear
CLK(I) TG
Copyright © 2016, Outputs Can Drive Upto10 LSTTL Loads Low Power Consumption, 80-µA Maximum ICC Typicaltpd= 12ns ±4-mA Output Driveat5V Low Input Currentof 1-µA Maximum Contain Eight Flip-Flops With Single-Rail Outputs Direct Clear Input Individual Data Inputto Each Flip-Flop On Products Compliantto MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. OnAll Other Products, Production
Processing Does Not Necessarily Include TestingAll Parameters.
Applications Bufferor Storage Registers Shift Registers Pattern Generators
D-type flip-flops witha direct active low clear (CLR)
input.
Informationat the data (D) inputs meeting the setup
time requirementsis transferredto theQ outputs on
the positive-going edge of the clock (CLK) pulse.
Clock triggering occursata particular voltage level
andis not related directlyto the transition timeof the
positive-going pulse. When CLKisat either the high low level, theD input hasno effectat the output.
Device Information(1)(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Logic Diagram, Each Flip-Flop (Positive Logic)
