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IRS21953SPBF
High Side and Dual Low Side Driver
International
TOR, Rectifier
Features
. 2 low side output channels sharing common ground
q 1 high side output channel
. CMOS Schmitt trigger inputs with pull down resistor
. Under voltage lockout on all channels
. 5 V compatible logic level Inputs
. Immune to -Vs spike and tolerant to dVsldt & dVss/dt
. Shoot through prevention logic
Descriptions
The IRS21953 contains 2 low side outputs sharing
common ground and 1 high side output. Low side drivers
can tolerate up to -600 V below input signal (VSS: input
supply return). High side driver can tolerate up to 600 V
above low side ground (COM: low side supply return).
The IRS21953 has better propagation delay and thermal
characteristics compared to a photo-coupler driver. The
logic inputs are compatible with standard CMOS or LSTTL
output. Proprietary HVIC and latch-up immune CMOS
technologies enable ruggedized monolithic construction.
Typical Connection Diagram
IRS21953SPBF
HIGH SIDE & DUAL LOW SIDE
DRIVER IC
Product Summary
vOFFSET (low side) -600 v NSS)
VOFFSET (high side) 600 V (COM)
VOUT 10 V to 20 V
ton/ts, (typ) 380 ns/380 ns
|o+/. 0.5 A/0.5 A
Package
'ii' -tyt
5:. kt "s
C', 'r, _
'fi'':'i',icss'
16-Lead SOIC (narrow body)
Sustain
Driver
vDco----', ,miE
o-IES: IRS21953
(SON16)
Driver
LllilLflL
-Vscan
-Vscan
International
TOR Rectifier
Absolute Maximum Ratings
IRS21953SPBF
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM.
Symbol Definition Min Max Units
LIN1 Floating logic level Input voltage I/SS-O. VDD+0.3
VDD Floating logic input supply voltage -0.3 625
VSS Floating logic input supply return voltage VDD-25 VDD+0.3
VB High side floating well supply voltage -0.3 625
vs High side floating well supply return voltage VB-25 VB+O.3
HO High side floating gate drive output voltage VS-0.3 VB+O.3 V
VCC Low side supply voltage -O.3 25
bg, Low side output voltage -0.3 VCC+O.3
dVS/dt Allowable VS offset transient relative to earth ground - 50 V ms
dVSS/dt Allowable VSS offset transient relative to earth ground - 50
Po Package power dissipation @ TA<=+25 °C - 1 W
ReJA Thermal resistance, junction to ambient - 100 °CNV
T J Junction temperature -55 150
Ts Storage temperature -55 150 "C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to COM.
Symbol Definition Min Max Units
LIN1 Floating logic level input voltage VSS VDD
VDD Floating logic input supply voltage VSS+1O VSS+20
VSS Floating logic input supply return voltage -5 600
VB High side floating well supply voltage VS+10 VS+20 V
VS High side floating well supply return voltage -5 600
HO High side Mating gate drive output voltage VS VB
VCC Low side supply voltage 10 20
L02 Low side output voltage 0 VCC
T, Ambient temperature -40 125 "C
Note I: Logic operation for Vs of -5 V to 600 V. Logic state held for Vs of -5 V to -lfs. (Please refer to Design Tip
DT97-3 for more details).
