IRS21814STRPBF ,High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs, All High Voltage Pins On One Side, and SPLGFeaturesPackagesFloating channel designed for bootstrap operation•Fully operational to +600 V 14-Le ..
IRS2181PBF , HIGH AND LOW SIDE DRIVER
IRS2181STRPBF ,High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs in a 8-Lead packageElectrical CharacteristicsV (V , V ) = 15 V, V = COM, C = 1000 pF, T = 25 °C.BIAS CC BS SS L ASymbo ..
IRS2183 ,Half Bridge Driver, SoftTurn-On, Low Side Inverting Input, Separate High and Low Side Input, 400ns Deadtime in a 8-Lead packageFeatures• Floating channel designed for bootstrap operationPackagesFully operational to +600 V•Tole ..
IRS21834PBF , HIGH AND LOW SIDE DRIVER
IRS21834S , HIGH AND LOW SIDE DRIVER
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IRS2181-IRS21814-IRS21814STRPBF-IRS2181STRPBF
High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs in a 8-Lead package
International Data SheetNo. PD60262
319R Rectifier IRS2181llRS21814(S)PbF
HIGH AND LOW SIDE DRIVER
Features P k
0 Floating channel designed for bootstrap operation ac ages
0 Tolerant to negative transient voltage, dV/dt IRS2181 IRS21814
Immune
lt Gate drive supply range from 10 V to 20 V
o Undervoltage lockout for both channels
0 3.3 V and 5 V input logic compatible
0 Matched propagation delay for both channels 8-Lead SOIC
0 Logic and power ground +/- 5 V offset IRS2181S
0 Lower di/dt gate driver for better noise immunity ftiiiiii,;
0 Output source/sink current capability 1.4 A/1.8 A Jn N, C
o RoHS compliant 'ct/iii''''' 14-Lead SOIC
IRS21814S
Description Feature Comparison
The IRS2181/lRS21814 are high Cross; .
voltage, high speed power MOSFET Part ‘28:: 2323:2332 Def“ Ground Pins toneittt
and IGBT drivers with independent logic
high-side and Iow-side referenced 221188114 HIN/LIN no none VSE/ggM 180/220
out ut channels. Pro rietar HVIC 2183 - I t I400 COM
andplatch immune CIVFIDOS teéhnolo- 21834 HIN/LIN yes Prol'112ri'lfL0 VSSEOM 180/220
gies enable ruggedized monolithic 221182: IN/SD yes Pdgnernn14fdla, VSEEASM 680/270
construction. The logic input is com-
patible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive
an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Typical Connection
upioiogv
Vcc F) =
- Vcc VB - (CI
Hwo A HIN HO _
LIN----- LIN VS "R,
COM LO H
lRS2181 mi upto_610V
== IRS21814 _
HO " m
Vcc L Vcc Va t
HINo HIN VS "T" CLO
o -- D
(Refer to Lead Assignments for correct pin LIN LIN A
configuration). These diagrams show Tr” H
electrical connections only. Please refer to Vss° Vss COM - "
our Application Notes and DesignTips for LO
proper circuit board layout. -
1
International
TOR Rectifier IRS2181/lRS218'14(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High-side floating absolute voltage -0.3 620 (Note 1)
Vs High-side floating supply offset voltage VB - 20 VB + 0.3
VH0 High-side floating output voltage Vs - 0.3 VB + 0.3
VCC Low-side and logic fixed supply voltage -0.3 20 (Note 1)
VLO Low-side output voltage -0.3 VCC + 0.3 V
VIN Logic input voltage (HIN & LIN) vss - 0.3 VCC + 0.3
vss Logic ground (IRS21814 only) V00 -20 VCC+0.3
dl/s/dt Allowable offset supply voltage transient - 50 V/ns
(8-lead PDIP) - 1.0
PD Package power dissipation @ TA S +25 "C (8-Iead SOIC) - 0.625 W
(14-lead PDIP) - 1.6
(14-Iead SOIC) - 1.0
(8-lead PDIP) - 125
. . . . (8-lead SOIC) - 200
RthJA Thermal resistance, junction to ambient °C/W
(14-Iead PDIP) - 75
(14-Iead SOIC) - 120
TJ Junction temperature - 150
Ts Storage temperature -50 150 °C
TL Lead temperature (soldering, 10 seconds) - 300
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. l. For proper operation the device should be used within the
recommended conditions. The vs and Vss offset rating are tested with all supplies biased at a 15 V differential.
Symbol Definition Min. Max. Units
VB High-side floating supply absolute voltage Vs + 10 vs + 20
Vs High-side floating supply offset voltage Note 2 600
VHo High-side floating output voltage Vs VB
Vcc Low-side and logic fixed supply voltage 10 20 v
VLo Low-side output voltage 0 VCC
VIN Logic input voltage (HIN & LIN) I/ss VCC
VSS Logic ground (IRS21814 only) -5 5
TA Ambient temperature -40 125 °C
Note 2: Logic operational for vs of -5 V to +600 V. Logic state held for Vs of -5 V to NBS. (Please refer to the Design Tip
DT97-3 for more details).
2
