IRS2104STRPBF ,Half Bridge Driver, Single Input Plus Inverting Shutdown Pin, Fixed 520ns Deadtime in a 8-Lead package Data Sheet No.PD60267IRS2104(S)PbFHALF-BRIDGE DRIVER
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IRS2104-IRS2104STRPBF
Half Bridge Driver, Single Input Plus Inverting Shutdown Pin, Fixed 520ns Deadtime in a 8-Lead package
Data Sheet No.PD60267
International
Ti,t2ill2, Rectifier IRS2104(S)PbF
HALF-BRIDGE DRIVER
Features Product Summary
lt Floating channel designed for bootstrap operation
o Fully operational to +600 v VOFFSET 600 V max.
0 Tolerant to negative transient voltage, dV/dt
immune IO+/- 130 mA/270 mA
0 Gate drive supply range from 10 V to 20 V
0 Undervoltage lockout VOUT 10 V - 20 V
0 3.3 V, 5 V, and 15 V input logic compatible
lt Cross-conduction prevention logic ton/off (typ.) 680 ns/150 ns
o Internally set deadtime .
Ct High-side output in phase with input Deadtime (typ.) 520 ns
0 Shutdown input turns off both channels
0 Matched propagation delay for both channels Packages
0 RoHS compliant
Description fstiiiiiii,s §
/7 F Ff,
The IRS2104 is a high voltage, high speed power _')iiiir''''' I)
MOSFET and IGBT driver with dependent high- and Iow- t
side referenced output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible
with standard CMOS or LSTTL output, down to 3.3 V
logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side
configuration which operates from 10 V to 600 V.
8 Lead SOIC 8 Lead PDIP
IRS2104S IRS2104
Typical Connection
up to 600 V
Vcc C M
- Vcc VB --
r‘\ KN
IN C IN HO
- - TO
SD 0 SD VS tt o LOAD
COM LO
(Refer to Lead Assignment for correct pin configuration). This diagram shows electrical T
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
1
International
152R Reciitier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
IRS2104(S) PbF
Symbol Definition Min. Max. Units
VB High-side floating absolute voltage -0.3 625
Vs High-side floating supply offset voltage VB - 25 VB + 0.3
VH0 High-side floating output voltage Vs - 0.3 V3 + 0.3
Vcc Low-side and logic fixed supply voltage -0.3 25 V
Wo Low-side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (IN & E) -O.3 VCC + 0.3
st/dt Allowable offset supply voltage transient - 50 V/ns
PD Package power dissipation @ TA s +25 °C (8 lead PDIP) - 1.0 W
(8 lead SOIC) - 0.625
. . . . (8 lead PDIP) - 125
RthJA Thermal resistance, junction to ambient °CNV
(8 lead SOIC) - 200
TJ Junction temperature - 150
Ts Storage temperature -55 150 ''C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The vs offset rating is tested with all supplies biased at a 15 V differential.
Symbol Definition Min. Max. Units
VB High-side floating supply absolute voltage Vs + 10 Vs + 20
Vs High-side floating supply offset voltage Note 1 600
VH0 High-side floating output voltage Vs VB V
Vcc Low-side and logic Fixed supply voltage 10 20
VLO Low-side output voltage 0 Vcc
VIN Logic input voltage (IN & E) 0 Vcc
TA Ambient temperature -40 125 ''C
Note 1: Logic operational for Vs of -5 V to +600 V. Logic state held for Vs of -5 V to NBS. (Please refer to the Design Tip
DT97-3 for more details).
