IRS2103STRPBF ,Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8-Lead package Data Sheet No. PD60263IRS2103(S)PbFHALF-BRIDGE DRIVER
IRS2104 ,Half Bridge Driver, Single Input Plus Inverting Shutdown Pin, Fixed 520ns Deadtime in a 8-Lead packageFeaturesProduct Summary• Floating channel designed for bootstrap operation• Fully operational to +6 ..
IRS2104PBF , HALF-BRIDGE DRIVER
IRS2104STRPBF ,Half Bridge Driver, Single Input Plus Inverting Shutdown Pin, Fixed 520ns Deadtime in a 8-Lead package Data Sheet No.PD60267IRS2104(S)PbFHALF-BRIDGE DRIVER
IRS2106 ,High and Low Side Driver, SoftTurn-On, Noninverting Inputs, All High Voltage Pins on One Side, SPLGFeaturesPackagesFloating channel designed for bootstrap operation•• Fully operational to +600 VTole ..
IRS21064PBF , HIGH AND LOW SIDE DRIVER
ISPLSI3256-70LM , High Density Programmable Logic
ISPLSI3256A-70LQI , In-System Programmable High Density PLD
ISPLSI3256E-70LQ , In-System Programmable High Density PLD
ISPLSI3448-70LB432 , In-System Programmable High Density PLD
ISPLSI5128VE-100LT128 , In-System Programmable 3.3V SuperWIDE High Density PLD
ISPLSI5256VA , In-System Programmable 3.3V SuperWIDE™ High Density PLD
IRS2103-IRS2103STRPBF
Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8-Lead package
Data Sheet No. PD60263
International
Ti,t2ill2, Rectifier IRS2103(S)PbF
HALF-BRIDGE DRIVER
Featqres . . Product Summary
0 Floating channel designed for bootstrap operation
lt Fully operational to +600 V VOFFSET 600 V max.
0 Tolerant to negative transient voltage, dV/dt
immune kyH- 130 mA/27O mA
0 Gate drive supply range from 10 V to 20 V
o Undervoltage lockout VOUT 10 V - 20 V
0 3.3 V, 5 V, and 15 V logic compatible
0 Cross-conduction prevention logic ton/off (typ.) 680 ns/150 ns
0 Matched propagation delay for both channels .
0 Internal set deadtime Deadtime (typ.) 520 ns
0 High-side output in phase with HIN input
0 Low-side output out of phase with m input Packages
o RoHS compliant
Description ftiiiiiis
The IRS2103 is a high voltage, high speed power {933/
MOSFET and IGBT drivers with dependent high- and
low-side referenced output channels._ Proprietary HVIC 8-Lea d PDIP 8-Lead SOIC
and latch Immune CMOS technologies enable rugge- IRS2103 IRS2103S
dized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down
to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side
configuration which operates up to 600 V.
Typical Connection
up to 600 V
Vcc C . Fel
Vcc VB
HIN o HIN HO
W o m VS . o L320
COM LO _
(Referto Lead Assignments for correct ctonhguration). This diagram shows electrical connections only. Please refer to
our Application Notes and DesignTips for proper circuit board layout.
1
International IRS2103(S)PbF
TOR lectifier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High-side floating absolute voltage -O.3 625
Vs High-side floating supply offset voltage VB - 25 VB + 0.3
VH0 High-side floating output voltage Vs - 0.3 VB + 0.3 V
VCC Low-side and logic fixed supply voltage -0.3 25
VLO Low-side output voltage -0.3 Vcc + 0.3
VIN Logic input voltage (HIN & W) -O.3 VCC + 0.3
dl/s/dt Allowable offset supply voltage transient - 50 V/ns
. . . (8 Lead PDIP) - 1.0
PD Package power dissipation @ TA 5 +25 °C W
(8 Lead SOIC) - 0.625
. . . . (8 Lead PDIP) - 125
RthJA Thermal resistance, junction to ambient °C/W
(8 Lead SOIC) - 200
TJ Junction temperature - 150
Ts Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The Vs offset rating is tested with all supplies biased at a 15 V differential.
Symbol Definition Min. Max. Units
VB High-side floating supply absolute voltage Vs + 10 Vs + 20
Vs High-side floating supply offset voltage Note 1 600
VH0 High-side floating output voltage Vs VB
Vcc Low-side and logic fixed supply voltage 10 20 V
VLo Low-side output voltage 0 VCC
VIN Logic input voltage (HIN & W) 0 Vcc
TA Ambient temperature -40 125 °C
Note 1: Logic operational for Vs of -5 V to +600 V. Logic state held for vs of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
