IRS2101STRPBF ,High and Low Side DriverElectrical CharacteristicsV (V , V ) = 15 V, C = 1000 pF and T = 25 °C unless otherwise specified.B ..
IRS2103 ,Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8-Lead packageElectrical CharacteristicsV (V , V ) = 15 V, C = 1000 pF and T = 25 °C unless otherwise specified.B ..
IRS2103 ,Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8-Lead packageFeaturesProduct Summary• Floating channel designed for bootstrap operation• Fully operational to +6 ..
IRS2103STRPBF ,Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8-Lead package Data Sheet No. PD60263IRS2103(S)PbFHALF-BRIDGE DRIVER
IRS2104 ,Half Bridge Driver, Single Input Plus Inverting Shutdown Pin, Fixed 520ns Deadtime in a 8-Lead packageFeaturesProduct Summary• Floating channel designed for bootstrap operation• Fully operational to +6 ..
IRS2104PBF , HALF-BRIDGE DRIVER
ISPLSI3192-100LQ , High Density Programmable Logic
ISPLSI3192-70LB272 , High Density Programmable Logic
ISPLSI3192-70LB272 , High Density Programmable Logic
ISPLSI3256-70LM , High Density Programmable Logic
ISPLSI3256A-70LQI , In-System Programmable High Density PLD
ISPLSI3256E-70LQ , In-System Programmable High Density PLD
IRS2101-IRS2101STRPBF
High and Low Side Driver
Data Sheet No. PD60250
International
IEZR Rectifier IRS2101(S)PbF
HIGH AND LOW SIDE DRIVER
Features Product Summary
0 Floating channel designed for bootstrap operation
o Fully operational to +600 v VOFFSET 600 V max.
0 Tolerant to negative transient voltage, dV/dt immune
o Gate drive supply range from 10 V to 20 V IO+/- 130 mA/270 mA
0 Undervoltage lockout
0 3.3 V, 5 V, and 15 V logic input compatible VOUT 10 V - 20 V
0 Matched propagation delay for both channels
0 Outputs in phase with inputs ton/off (typ.) 160 ns/150 ns
dt RoHS compliant Delay Matching 50 ns
Description
The IRS2101 is a high voltage, high speed power Packages
MOSFET and IGBT driver with independent high-side
and Iow-side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable ftiiti,,s
ruggedized monolithic construction. The logic input otijiiit''''
is compatible with standard CMOS or LSTTL output, _
down to 3.3 V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver 81Eesa2d1ggc 8-Lead PDIP
cross-conduction. The floating channel can be used to IRS2101
drive an N-channel power MOSFET or IGBT in the high-
side configuration which operates up to 600 V.
Typical Connection
up to 600 V
Vcc C . V:
mgr K\
i Vcc VB I
HIN o HIN HO
LIN 0 LIN Vs at tt SLJED
.- COM LO LTi'
IRS2101 L1
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
1
International
TOR Rectifier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
IRS2101(S)PbF
Symbol Definition Min. Max. Units
VB High-side floating supply voltage -0.3 625
Vs High-side floating supply offset voltage VB - 25 VB + 0.3
VH0 High-side floating output voltage vs - 0.3 VB + 0.3 V
Vcc Low-side and logic fixed supply voltage -O.3 25
VLO Low-side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (HIN & LIN) -0.3 Vcc+0.3
dl/s/dt Allowable offset supply voltage transient - 50 V/ns
PD Package power dissipation @ TA s: +25 °C (8 lead PDIP) - 1.0 W
(8 lead SOIC) - 0.625
. . . . (8 lead PDIP) - 125
RthJA Thermal resistance, junction to ambient °CNV
(8 lead SOIC) - 200
TJ Junction temperature - 150
Ts Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The Vs offset rating is tested with all supplies biased at a 15 V differential.
Symbol Definition Min. Max. Units
VB High-side floating supply absolute voltage Vs + 10 Vs + 20
Vs High-side floating supply offset voltage Note 1 600
VH0 High-side floating output voltage VS VB V
Vcc Low-side and logic fixed supply voltage 10 2O
VLo Low-side output voltage 0 Vcc
VIN Logic input voltage (HIN & LIN) O Vcc
TA Ambient temperature -40 125 °C
Note 1: Logic operational for Vs of -5 V to +600 V. Logic state held for Vs of -5 V to A/BS. (Please refer to the Design
Tip DT97-3 for more details).
