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IRLS4030
100V Single N-Channel HEXFET Power MOSFET in a D2-Pak package
International PD-97370
TOR Rectifier IRLS4030PbF
IRLSL4030PbF
Applications
o DC Motor Drive HEXFET*) Power MOSFET
0 High Efficiency Synchronous Rectification in SMPS D
o Uninterruptible Power Supply VDSS 100V
0 High Speed Power Switching RDS(on) typ. 3.4mQ
q Hard Switched and High Frequency Circuits G max. 4.3mQ
Benefits s ID 180A
q Optimized for Logic Level Drive
o Very Low RDS(ON) at 4.5V VGS
. Superior R*Q at 4.5V VGS 1giit:
0 Improved Gate, Avalanche and Dynamic dV/dt .:g,aiii), 'ii1)l'is"i) u.
Ruggedness ''Ri't " S "u. (r-s" .
0 Fully Characterized Capacitance and Avalanche {GD , 1f
SOA D2P k TO 26:
9 Enhanced body diode dV/dt and dl/dt Capability IRLS4osaOPbF IRLSL4030bF
o Lead-Free
Gate Drain Source
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ To = 25°C Continuous Drain Current, Vss @ 10V 180
ID @ To = 100°C Continuous Drain Current, VGS @ 10V 130 A
G, Pulsed Drain Current co 730
PD @Tc = 25°C Maximum Power Dissipation 370 W
Linear Derating Factor 2.5 W/°C
Vas Gate-to-Source Voltage i 16 V
dv/dt Peak Diode Recovery © 21 V/ns
Tu Operating Junction and -55 to + 175 ''C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Avalanche Characteristics
EAS(Thermal|ylimited) Single Pulse Avalanche Energy © 305 mJ
IAR Avalanche Current C) See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy © mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
ReJC Junction-to-Case ©© - 0.40 °C/W
Rss Junction-to-Ambien1(PCB Mount) ©© - 40
1
02/12/09
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IRLS/SL4030PbF
International
TOR Rectifier
Static © To = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 - - V Vas = 0V, ID = 250pA
AV(BR)DSS/ATJ Breakdown Voltage Temp. Coefficient - 0.10 - V/°C Reference to 25''C, ID = 5mAC0
Roman) Static Drain-to-Source On-Resistance - 3.4 4.3 mg Vss = 10V, ID = 110A ©
- 3.6 4.5 l/ss = 4.5V, lo = 92A ©
Vssith) Gate Threshold Voltage 1.0 - 2.5 V Vos = l/as, ID = 250pA
loss Drain-to-Source Leakage Current - - 2O VDS = 100V, Vss = 0V
- - 250 PA l/ns = 100v, Vss = OV, TJ = 125°C
less Gate-to-Source Forward Leakage - - 100 Vas = 16V
Gate-to-Source Reverse Leakage - - -100 nA Vas = -16V
Ream) Internal Gate Resistance -.-.- 2.1 - Q
Dynamic © Tu = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 320 - - S Vos = 25V, ID = 110A
q, Total Gate Charge - 87 130 ID = 110A
Qgs Gate-to-Source Charge - 27 - VDS = 50V
di Gate-to-Drain ("Miller") Charge - 45 - nC l/ss = 4.5V 6)
stnc Total Gate Charge Sync. (Qg - di) - 42 - ID = 110A, Vos =0V, I/ss = 4.5V
tdion) Turn-On Delay Time - 74 - VDD = 65V
t, Rise Time - 330 - ID = 110A
1mm Turn-Off Delay Time - 110 - ns Re = 2.79
t, Fall Time - 170 - Vas = 4.5V ©
Ciss Input Capacitance - 11360 - Vss = 0V
Coss Output Capacitance - 670 - Vos = 50V
Crss Reverse Transfer Capacitance - 290 - pF f = 1.0MHz
0055 eff. (ER) Effective Output Capacitance (Energy Related)6 - 760 - N/ss = 0V, VDS = 0V to 80V ©
Coss eff. (TR) Effective Output Capacitance (Time Related)© - 1140 - l/ss = 0V, Vos = 0V to 80V s
Diode Characteristics
Symbol Parameter Min Typ. Max. Units Conditions
ls Continuous Source Current 1 MOSFET symbol D
(Body Diode) - - 80 showing the
ISM Pulsed Source Current A integral reverse G
. - - 730 . . .
(Body Diode) (O p-n junction diode. S
VSD Diode Forward Voltage - - 1.3 V TJ = 25°C, ls = 110A, Vss = OV Ci)
trr Reverse Recovery Time - 50 - TJ = 25°C VR = 85V,
- 60 - ns To-- 125°C IF=110A
Q,, Reverse Recovery Charge - 88 - TJ = 25°C di/dt = 100A/ps ©
- 130 - nC TJ = 125°C
IRRM Reverse Recovery Current - 3.3 - A To = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
OD Repetitive rating; pulse width limited by max. junction
temperature.
© Limited by TJmax, starting T; = 25°C, L = 0.05mH
Rs = 259, IAS = 110A, VGS =1OV. Part not recommended for use
above this value .
© ISD C110A,di/dts 1330A/ps, VDD I V(BR)DSSI TJ £17500.
@ Pulse width f 400ps; duty cycle 3 2%.
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© Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Cos,S while l/cs is rising from O to 80% V033.
© COSS eff. (ER) is a fixed capacitance that gives the same energy as
Cass while VDs is rising from O to 80% Voss.
Cr) When mounted on I" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
Re is measured at TJ approximately 90°C.
© Redo value shown is at time zero.
