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IRL3302SIRN/a4300avai20V Single N-Channel HEXFET Power MOSFET in a D2-Pak package


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IRL3302S
20V Single N-Channel HEXFET Power MOSFET in a D2-Pak package
PD - 9.1692A
IRL3302S
International
ISER Rectifier
PRELIMINARY
HEXFET® Power MOSFET
o Advanced Process Technology D
o Surface Mount VDSS = 20V
o Optimized for 4.5V-7.0V Gate Drive
a Ideal for CPU Core DC-DC Converters -
R - 0.020W
o Fast Switching G DS(on)
I = 39A
Description
These HEXFET Power MOSFETs were designed
specifically to meet the demands of CPU core DC-DC
converters. Advanced processing techniques
combined with an optimized gate oxide design results
in a die sized specifically to offer maximum efficiency
at minimum cost.
The D2Pak is a surface mount power package capable
of accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because
of its low internal connection resistance and can
dissipate up to 2.0W in a typical surface mount
application.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 4.5VS 39
ID @ To = 100°C Continuous Drain Current, VGS @ 4.5VC0 25 A
IDM Pulsed Drain Current OS 160
PD @Tc = 25°C Power Dissipation 57 W
Linear Derating Factor 0.45 W/°C
N/cs Gate-to-Source Voltage 1 10 V
EAS Single Pulse Avalanche Energy@@ 130 m]
IAR Avalanche Current0) 23 A
EAR Repetitive Avalanche Energy0) 5.7 ntl
dv/dt Peak Diode Recovery dv/dt OG) 5.0 V/ns
TJ Operating Junction and -55 to + 150
TSTG Storage Temperature Range (
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
Ric Junction-to-Case - 2.2
RqJA Junction-to-Ambient ( PCB Mounted,steady-state)** - 40 °CNV

9/17/97
IRL.3302S
International
TOR Rectifier
Electrical Characteristics @ Tu = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 20 - - V N/ss = 0V, ID = 250pA
DV(BR)Dss/DTJ Breakdown Voltage Temp. CoefMient - 0.022 - V/°C Reference to 25°C, ID = ImA6)
. . . - - 0.023 VGS = 4.5V, ID = 23A (4)
RDS(on) Static Drain-to-Source On-Resistance - - 0.020 W VGS = 7.0V, ID = 23 A CO
VGS(th) Gate Threshold Voltage 0.70 - - V 1hos = VGS, ID = 250pA
gm Forward Transconductance 21 - - S Vos = 10V, lo = 23AS
loss Drain-to-Source Leakage Current - - 25 PA Vros = 20V, I/ss = 0V
- - 250 VDS = 10V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage - - 100 VGs = 10V
IGSS Gate-to-Source Reverse Leakage - - -100 nA VGS = -10V
ck, Total Gate Charge - - 31 ID = 23A
Q95 Gate-to-Source Charge - - 5.7 nC Vos = 16V
di Gate-to-Drain ("Miller") Charge - - 13 I/ss = 4.5V, See Fig. 6 cos
td(on) Turn-On Delay Time - 7.2 - VDD = 10V
tr Rise Time - 110 - ns ID = 23A
td(ott) Turn-Off Delay Time - 41 - RG = 9.5W, I/ss = 4.5V
tf FallTime - 89 - Ro = 2.4W, (406)
Between lead,
LS Internal Source Inductance - 7.5 - nH .
and center of die contact
Ciss Input Capacitance - 1300 - VGs = 0V
Cogs Output Capacitance - 520 - pF Vos = 15V
Crss Reverse Transfer Capacitance -- 190 -- f = 1.0MHz, See Fig. 5(S)
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
ls Continuous Source Current - - 39 MOSFETsymbol D
(Body Diode) A showing the iii
ISM Pulsed Source Current - - 160 integral reverse G E
(Body Diode) (DCO p-n junction diode. s
VSD Diode Forward Voltage - - 1.3 V Tu = 25°C, Is = 23A, VGS = 0V ©
trr Reverse Recovery Time - 62 94 ns Tu = 25°C, IF = 23A
er Reverse Recovery Charge 110 160 nC di/dt = 100A/ps coco
tion Forward Turn-On Time Intrinsic tum-on time is negligible (tum-on is dominated by Ls+LD)
Notes:
co Repetitive rating; pulse width limited by
max. junction temperature.
© Starting To = 25°C, L = 0.49mH
RG = 25W, IAS = 23A.
Tus15ty'C
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.

© k;o E 23A, di/dt E 97A/ps, VDD f V(BR)DSS:
GD Pulse width f 300ps; duty cycle L 2%.
6) Uses IRL3302 data and test conditions
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