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TOR
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IRF6150
-20V Dual P-Channel HEXFET Power MOSFET in a 16-Lead FlipFET package
International
:rartRectifier
Ultra Low Rss(0n) per Footprint Area
Low Thermal Resistance
Bi-Directional P-Channel Switch
Super Low Profile (<.8mm)
Available Tested on Tape & Reel
Description
True chip-scale packaging is available from International
Rectifier. Through the use of advanced processing tech-
niques and a unique packaging concept, extremely low
on-resistance and the highest power densities in the
industry have been made available for battery and load
management applications. These benefits, combined with
the ruggedized device design that International Rectifier
is well known for, provides the designer with an ex-
tremely efficient and reliable device.
The FIipFETTM package, is one-third the footprint of a
comparable SO-8 package and has a profile of less than
.8mm. Combined with the low thermal resistance of the
die level device, this makes the FlipFETTM the best device
for applications where printed circuit board space is at a
premium and in extremely thin application environments
such as battery packs, cell phones and PCMCIA cards.
Absolute Maximum Ratings
PROVISIONAL
PD - 93943
IRF615O
HEXFET© Power MOSFET
Rssmm max
0.036n@Vss1,2 = -4.5V
0.052n@Vss1,2 = -2.5V
"i. «i
Parameter
Source- Source Voltage
IS @ TC = 25°C
Continuous Current, VGS1 = Kass, = -4.5V
IS @ TC = 70°C
Continuous Current, VGS1 = Kass, = -4.5V
Pulsed Current co
Pro @Tc = 25°C
Power Dissipation
PD @Tc = 70°C
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Tu, TSTG
Junction and Storage Temperature Range
-55 to + 150
Thermal Resistance
Symbol
Parameter
Junction-to-Ambient®
ReJ-PCB
Junction-to-PCB mounted
6/29/00
IRF6150 PROVISIONAL International
TOR Rectifier
Electrical Characteristics @ T J = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)SSS Source-to-Source Breakdown Voltage -20 - - V VGS = 0V, ID = -250pA
AV(BR)sss/ATJ Breakdown Voltage Temp. Coefficient - -TBD - Vl°C Reference to 25°C, ID = -1mA
Rssm Static Source-to-Source On-Resistance - - 0.036 n V931 = V652 = -4.5V, k; = -7SA ©
- - 0.052 VGS1= VGSZ = -2.5V, Is = -6.3A ©
VGS(th) Gate Threshold Voltage -0.45 - -1.2 V Vss = VGs, IS = -250pA
gts Forward Transconductance TBD - - S Vss = -10V, Is = -7.9A
lsss Zero Gate Voltage Source Current - - -1.0 PA Vss = -20V, VGS = 0V
- - -25 Vss = -16V, I/ss = 0V, To = 125°C
less Gate-to-Source Forward Leakage - - 100 nA Vss = 12V
Gate-to-Source Reverse Leakage - - -100 l/ss = -12V
% Total Gate Charge - TBD TBD Is = -TBDA
Qgs Gate-to-Source Charge - TBD TBD nC Vss = -16V
031.52 Miller Charge - TBD TBD VGs = -5.0V©
tdmn) Turn-On Delay Time - TBD - Vss = -10V
tr Rise Time - TBD - ns ls = -1.0A
td(off) Turn-Off Delay Time - TBD - Rs = 6.09
tr Fall Time - TBD - VGS = -5.0V ©
Ciss Input Capacitance - TBD - VGS = 0V
Coss Output Capacitance - TBD - pF l/ss = -15V
Crss Reverse Transfer Capacitance - TBD - f = 1.0MHz
Notes:
C) Repetitive rating; pulse width limited by
max. junction temperature.
© Pulse width f 400ps; duty cycle 3 2%. Gate voltage applied to both gates.
© When mounted on 1 inch square 202 copper on FR-4
2
