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IR3527M
A full featured and flexible way to implement multiphase power solutions.
International
TOR Rectifier IR3527
DATA SHEET
XPHASE3TM DUAL PHASE IC
DESCRIPTION
The IR3527 Dual Phase IC combined with an IR XPhase3TM Control IC provides a full featured and flexible
way to implement multiphase power solutions. The Control IC provides overall system control and interfaces
with any number of IR3527 Phase ICs which each drive and monitor 2 phases of a Synchronous Buck
converter.
The IR3527 implement an independent power savings function for each power stage and sequential phase
timing for use in single output multiphase converters. When power saving mode is enabled, the power stage
will disable its output thus eliminating its switching loss while proper converter operation is maintained by the
single power stage or in conjunction with other converter power stages. The IR3527 current sense amplifiers
remain active when in power savings to support adaptive voltage positioning.
FEATURES
7V/1.3A gate drivers (2.6A GATEL sink current)
Converter output voltage up to 5.1 V (Limited to VCCL-1.4V)
Loss-less inductor current sensing
Feed-forward voltage mode control
Integrated boot-strap synchronous PFET
Self-calibration of PWM ramp, current sense amplifier, and current share amplifier
Single-wire bidirectional average current sharing
Only three external components per phase, plus common decoupling capacitors
Power State Indicator (PSI) interface provides the capability to maximize the efficiency at light loads.
Debugging function isolates phase from the converter
Small thermally enhanced 24L 4 x 4mm MLPQ package
RoHS compliant
VIN (12V)
(SAT EH2
CSIN1+ VOUT+
3 Wire EAIN
Analog
ISHARE IW3527 DUAL GATEL2 COUT
PHASE IC
DACIN VOUT-
Savi ngs
Control
PHSOUT
BOOST1
GATEH1
3 Wire
Digital
Timing
IC Bias
(7V) I CVCCL g
Figure 1 - IR3527 Application Circuit
Page 1 of 20 V3.0
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International
TOR liectifier
IR3527
ORDERING INFORMATION
Part Number
Package Order Quantity
IR3527MTRPBF
24 Lead MLPQ
(4 x 4 mm body)
3000 per reel
* IR3527MPBF
24 Lead MLPQ
(4 x 4 mm body)
100 piece strips
* Samples only
PIN DESCRIPTION
PIN# PIN PIN DESCRIPTION
SYMBOL
1 CSIN1+ Phase1 current sense amplifier non-inverting input and input to debug comparator
2 EAIN PWM comparator input from the error amplifier output of Control IC. Body Braking
mode is initiated if the voltage on this pin is less than V(DACIN) threshold.
3 ISHARE Output of the Current Sense Amplifiers are connected to this pin through 3kQ
resistors. Voltage on this pin is equal to approximately V(DACIN) + 16 [(VcaN1+-
VCSIN1_) + (Vcsw2+- l/carer)]. Connecting all Phase IC ISHARE pins together creates
a share bus which provides an indication of the average current being supplied by all
the phases. The signal is used by the Control IC for voltage positioning, over-current
protection, and in some cases current reporting. OVP mode is initiated if the voltage
on this pin rises above V(VCCL)- 0.8V.
4 DACIN Reference voltage input from the Control IC. The Current Sense signal and PWM
ramps are referenced to the voltage on this pin.
5 PSI1 Input to Phase 1 PSI comparator. Logic low stops the phase from switching (low =
low power state)
6 PSI2 Input to Phase 2 PSI comparator. Logic low stops the phase from switching (low =
low power state)
PHSIN Phase timing clock input.
8 PHSOUT Phase timing clock output.
9 CLKIN Clock input.
10 SW1 Return for Phase1 high-side driver and reference for GATEL1 non-overlap
comparator.
11 GATEH1 Phase1 High-side driver output and input to GATEL1 non-overlap comparator.
12 BOOST1 Supply for Phase1 high-side driver. Internal bootstrap synchronous PFET is
connected between this pin and the VCCL1 pin.
13 VCCL1 Supply for Phase1 Iow-side driver. Internal bootstrap synchronous PFET is
connected from this pin to the BOOST1 pin.
14 GATEL1 Phase1 Low-side driver output and input to GATEH1 non-overlap comparator.
15 PGND Return for low side drivers and reference for GATEH non-overlap comparators.
16 GATEL2 Phase2 Low-side driver output and input to GATEH2 non-overlap comparator.
17 VCCL2 Supply for Phase2 Iow-side driver. Internal bootstrap synchronous PFET is
connected from this pin to the BOOST pin.
18 BOOST2 Supply for Phase2 high-side driver. Internal bootstrap synchronous PFET is
connected between this pin and the VCCL1 pin.
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