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IR3522M-IR3522MTRPBF
The IR3522 Control IC combined with IR3506 xPHASE3 Phase ICs implements a full featured DDR3 power solution.
International
TOR Rectifier IR3522
DATA SHEET
XPHASE3TM DDR & VTT CONTROL IC
DESCRIPTION
The IR3522 Control IC combined with IR3506 XPHASE3"u Phase ICs implements a full featured DDR3
power solution. The IR3522 provides control functions for both the VTT (single phase) and VDDR
(multiphase) power rails which can interfaces with any number of IR3506 ICs each driving and monitoring
a single phase to power any number of DDR3 DIMMs. The XPHASE3TM architecture delivers a power
supply that is smaller, more flexible, and easier to design while providing higher efficiency than
conventional approaches.
FEATURES
Pc interface programs 1.025V< VREF1<1.612V, the VDD output voltage reference
ft also programs the VTT tracking ratio , 25 %, and provides digital ON/OFF control
Four different IZC addresses are selectible using 2 ADDR pins
Four different VREF1 voltages are selectible using 2 VID pins if I't communication is not available
VTT tracking defaults to 1/2 the VDD Remote Sense Amp output voltage
Power Good output driven by an external bias input
VDD to VTT overvoltage protection
Soft-Stop turn-off to ensure VDDR and Vtt tracking
Fault activated Crowbar pin to drive external NMOS devices for external output voltage protection
Pin programmable slew rate of ft programmed VREF1 voltage transitions
0.5% overall VDD system set point accuracy
Remote sense amplifiers provide differential sensing and requires less than 50uA bias current
Pin programmable per phase switching frequency of 250kHz to 1.5MHz
Complete protection including over-current, over-voitage, open remote sense, and open control
APPLICATION CIRCUIT
12N 12V To Converters
VCCL TO Phase IC
VCCL & GATE
DRIVE BIAS
Phase Clock Input to
PHSIN Last Phase 1C of VDD
PHSUUT 2 wire Digital
Daisy ChaLn Bus
to Phase ICs
CLKOUT
HPGBIAS
PGBIAS
Drives NMOS Crowbar
ENABLE UROWBAR devices at VTT and
VDDR rails
ENABLE I R3 5 2 2 CROWBAR
IIN2 CONTROL (IN1
ADDHI IC SWDELI
CSS/DEL
AD DRe VREFI
DCSETZ OCSETI
EAOUT2 EADUTI
RFB12 RGP1
ISHARE1
EA0UT1 5 Wire Analog
Phase IC
Control Bus
EAOUT2
ISHAREZ
TO Vtt VTTSENSE TO VDD
Remote t DDR SENSE, Remote
VTTSENSE' DDR SENSE- Sense
Figure 1 - IR3522 Application Circuit
International
TOR Rectifier IR3522
ORDERING INFORMATION
Device Package Order Quantity
IR3522MTRPBF 32 Lead MLPQ (5 x 5 mm body) 3000 per reel
* IR3522MPBF 32 Lead MLPQ (5 x 5 mm body) 100 piece strips
* Samples only
PIN DESCRIPTION
PIN# PIN SYMBOL PIN DESCRIPTION
1 SDA SDA (Serial Data) is a bidirectional signal that is an input and open drain output for
both master (IZC controller) and slave (IR3522). SDA requires a pull resistor to a
bias voltage and should not be floated.
2 PGBIAS Input to provide bias to the Power Good output transistor directly from the converter
input voltage. Enables the Power Good output to assert even if there is no bias
supplied to the VCCL pin. Internal voltage clamp protects the pin. Do not exceed
100 uA of pull-up current.
3 ENABLE Enable input. A logic low applied to this pin puts the IC into fault mode. A logic high
on the pin resets and enables the converter. Do not float this pin as the logic state
will be undefined.
4 llN2 Output 2 average current input from the output 2 phase IC(s).
5 ADDR1 Digital input to program bit 1 of the 2 bit address code with internal pull-up. Connect
to LGND for logic "O", float for logic "I "
6 ADDR2 Digital input to program bit 2 of the 2 bit address code with internal pull-up. Connect
to LGND for logic "O", float for logic "I "
7 OCSET2 Programs the output 2 constant converter output current limit through an external
resistor tied to VREFI and an internal current source from this pin. Over-current
protection can be disabled by over sizing the resistor value to program the threshold
higher than IIN2 pin possible signal amplitude, but no greater than 5V (do not float
this pin as improper operation will occur).
8 EAOUT2 Output of the output 2 error amplifier.
9 FB2 Inverting input to the output 2 error amplifier.
10 VOUT2 Output 2 remote sense amplifier output.
11 VOSEN2+ Output 2 remote sense amplifier input. Connect to output at the load.
12 VOSEN2- Output 2 remote sense amplifier input. Connect to ground at the load.
13 VOSEN1- Output 1 remote sense amplifier input. Connect to ground at the load.
14 VOSEN1+ Output 1 remote sense amplifier input. Connect to output at the load.
15 VOUT1 Output 1 remote sense amplifier output. Provides reference to Error Amp2.
16 FB1 Inverting input to the output 1 error amplifier.
17 EAOUT1 Output of the output 1 error amplifier.
18 OCSET1 Programs the output 1 constant converter output current limit through an external
resistor tied to VREF1 and an internal current source from this pin. Over-current
protection can be disabled by over sizing the resistor value to program the threshold
higher than IIN2 pin possible signal amplitude, but no greater than 5V (do not float
this pin as improper operation will occur).
19 VREF1 Reference voltage programmed by the It inputs and error amplifier non-inverting
input. Connect an external RC network to LGND to program dynamic VID slew rate
and provide compensation for the internal buffer amplifier.
20 SS/DEL1 Connect an external capacitor to LGND to program startup and Fault delay timing
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