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IR3220S
Fully Protected H-Bridge for DC Motor in a 20 Lead SOIC package
Data Sheet No.PD60180-C
International
IéaR Rectifier IR3220S
FULLY PROTECTED H-BRIDGE FOR D.C. MOTOR
Features
The IR32208 is a fully protected dual high side switch LC that
integrates an H-bridge motor controller with two very efficient
high side MOSFETs in a single 20-pin package. The IR3220S
combines with the two low side IRF7484Q MOSFETs as few as
10 external passive components to provide a complete, fully op- 6 A Continuous Current Capability
erational and fully protected H-bridge control actuator with for- . .
ward, reverse, braking and non-braking modes without the need without Heat Sink (2 X 13 m9)
of a micro-controller.
Programmable PWM ln-rush
CurrentLimitation (e.g 18A)
Over-Temperature (165 'C) and
. . . Over-Current 30A Protections
FunctionalDescription ( )
The high side switches provide the direction capability and the H- 20 kHz PWM Oscillator Embedded
bridge protection. The low side MOSFETs bring the flexibility by
offering the high frequency switching ability. Therefore, crude Low & High Frequency Switching
start-up of the motor is avoided and replaced by a smooth and Operation (self adaptive dead-time)
stress-less speed ramp-up.
Easy Speed / Torque Control
The IR3220S features shoot-through protection for each leg, H- (analog duty cycle input)
bridge logic control, soft-start sequence and over-current / over-
temperature shutdown protections. Two inputsignals (IN1 & IN2) Braking / Non-Braking Modes
select the operating modes while the PWM soft-start sequence
cycles the corresponding active low side MOSFET in order to Sleep Mode (braking) for
limit the motor in-rush current. The soft-start sequence is pro- Automotive Actuator
grammed by an RC time constant and reset itself automatically.
Thanks to the inner PWM oscillator, the IR3220S can also be
the final stage of an overall torque or speed loop. If needed, an
external clock may force the H-bridge switching operation. This
can be combined with low frequency PWM operation through
the IN1(2) inputs.
Packages
The IR3220S is a Co-pack lPS product offering very low Rds(on)
and a high level of functionality and protection. Its open architec-
ture and programmability helps the designer to optimize each 8-Lead SOIC
motor drive upon the application requirements at a very low cost. IRF7484Q
For automotive actuators, the motor is kept shorted even during
the low consumption sleep mode. Shoot-through protection, over-
temperature & over-current shutdowns, self-adaptive dead-time
and PWM circuitries are described in details in the AN 1032
Application Note. A general purpose method to help rating the
soft-start sequence as well as layout and thermal considerations
are also covered. Finally, a 6A DC motor actuator with a PCB
size down to 1 Inch2 is suggested in the document.
20-Lead SOIC
(wide body)
1
IR3220S International
TOR Rectifier
Functional Block Diagram (see AN-1032 for a detailed description of each block)
SS Vrc
T 05k Il-k-svn,,:
Soft Start duty cycle t H
AN s S reset
_ Oscillator m m
VCC C,
IN l I H Bridge logic control IN 2
& status feedback
40 V Acme Clamp 40 v Austne Chum
Over current Over current
Sh h 0h shutdown Over temp. shutdown Sh h h
" oot-t pug protection _ ool-t mug
protection protection
l 47J m
Low Side Lou Side = G 7
G l 50 Driver Driver
f -i" (5
M l M 2 Gnd
Thanks to the self-adaptive dead-time circuitry, the low side MOSFET of each leg is driven in the opposite
phase of the high side one without any conflict. Thus, the single INI signal turns on the leg M1 (and IN2, the
output M2). Consequently, when both INI and IN2 are low, the quiescent state of the H-bridge is the Braking
Mode (the two low side MOSFETs on). The over-temperature circuitry and the two over-current protections
(one per leg) protect the IC and flag the DG pin. The thermal shutdown also covers the body diode over-
heating. Fault conditions are reset by cycling the corresponding IN1(2) input. Each leg appears independent
so that the PWM soft-start management is greatly simplified and makes the 20kHz oscillator block almost a
separate function. The positive input of the PWM comparator is accessible on the ss pin. An external analog
voltage or a RC network can either drive the duty cycle. It has to be said that a clock signal (< 20 kHz) applied
on this input will directly drive the low side MOSFETs. A 5V voltage source is embedded in the LC ( switched
off while in the sleep mode ) so that no additional power supply is needed for the soft-start RC time constant.
Its capacitor is discharged through the t , SS reset ' ' circuitry every time IN1 equals IN2. Thus, the soft-start
sequence is ready to operate whichever the formerly braking mode was.
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