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IR2184-IR21844-IR21844S-IR2184S
High and Low Side Driver, SoftTurn-On, Single Input Plus Inverting Shut-Down, 500ns Deadtime in a 8-pin DIP package
IR2184(4)(S) & (PbF)
Typical Connection
HALF-BRIDGE DRIVERFeaturesFloating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune•Gate drive supply range from 10 to 20V•Undervoltage lockout for both channels•3.3V and 5V input logic compatible•Matched propagation delay for both channels•Logic and power ground +/- 5V offset.•Lower di/dt gate driver for better noise immunity•Output source/sink current capability 1.4A/1.8A•Also available LEAD-FREE (PbF)
IR21844
IR2184
1
Data Sheet No. PD60174 revG
(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
Packages
14-Lead PDIP
IR21844
8-Lead SOIC
IR2184S14-Lead SOIC
IR21844S
8-Lead PDIP
IR2184
Description
The IR2184(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The
logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600
volts.
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IR2181/IR2183/IR2184 Feature Comparison
IR2184(4)(S) & (PbF)
SymbolDefinitionMin.Max.UnitsHigh side floating absolute voltage-0.3625High side floating supply offset voltageVB - 25VB + 0.3
VHOHigh side floating output voltageVS - 0.3VB + 0.3
VCCLow side and logic fixed supply voltage-0.325
VLOLow side output voltage-0.3VCC + 0.3Programmable dead-time pin voltage (IR21844 only)VSS - 0.3VCC + 0.3
VINLogic input voltage (IN & SD)VSS - 0.3VSS + 10
VSSLogic ground (IR21844 only)VCC - 25VCC + 0.3
dVS/dtAllowable offset supply voltage transient—50V/nsPackage power dissipation @ TA ≤ +25°C(8-lead PDIP)—1.0
(8-lead SOIC)—0.625
(14-lead PDIP)—1.6
(14-lead SOIC)—1.0
RthJAThermal resistance, junction to ambient(8-lead PDIP)—125
(8-lead SOIC)—200
(14-lead PDIP)—75
(14-lead SOIC)—120Junction temperature—150Storage temperature-50150Lead temperature (soldering, 10 seconds)—300
°C/W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.High side floating supply absolute voltageVS + 10VS + 20High side floating supply offset voltageNote 1600
VHOHigh side floating output voltageVSVB
VCCLow side and logic fixed supply voltage1020
VLOLow side output voltage0VCC
VINLogic input voltage (IN & SD)VSSVSS + 5Programmable dead-time pin voltage (IR21844 only)VSSVCC
VSSLogic ground (IR21844 only)-55Ambient temperature-40125°C
SymbolDefinitionMin.Max.Units
IR2184(4)(S) & (PbF)
3
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.
SymbolDefinition Min. Typ.Max.UnitsTest Conditions
tonTurn-on propagation delay—680900VS = 0V
toffTurn-off propagation delay—270400VS = 0V or 600V
tsdShut-down propagation delay—180270
MTonDelay matching, HS & LS turn-on—090
MToffDelay matching, HS & LS turn-off—040Turn-on rise time—4060VS = 0VTurn-off fall time—2035VS = 0VDeadtime: LO turn-off to HO turn-on(DTLO-HO) &280400520RDT= 0
HO turn-off to LO turn-on (DTHO-LO)456μsec RDT = 200k
MDTDeadtime matching = DTLO - HO - DTHO-LO—050 RDT=00600 RDT = 200k
nsec
nsec
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, DT= VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
SymbolDefinitionMin.Typ.Max.UnitsTest Conditions
VIHLogic “1” input voltage for HO & logic “0” for LO2.7——VCC = 10V to 20V
VILLogic “0” input voltage for HO & logic “1” for LO——0.8VCC = 10V to 20V
VSD,TH+SD input positive going threshold2.7——VCC = 10V to 20V
VSD,TH-SD input negative going threshold——0.8VCC = 10V to 20V
VOHHigh level output voltage, VBIAS - VO——1.2IO = 0A
VOLLow level output voltage, VO——0.1IO = 0A
ILKOffset supply leakage current——50VB = VS = 600V
IQBSQuiescent VBS supply current2060150VIN = 0V or 5V
IQCCQuiescent VCC supply current0.41.01.6mAVIN = 0V or 5V
IIN+Logic “1” input bias current—2560IN = 5V, SD = 0V
IIN-Logic “0” input bias current——1.0IN = 0V, SD = 5V
VCCUV+VCC and VBS supply undervoltage positive going8.08.99.8
VBSUV+threshold
VCCUV-VCC and VBS supply undervoltage negative going7.48.29.0
VBSUV-threshold
VCCUVHHysteresis0.30.7—
VBSUVH
IO+Output high short circuit pulsed current1.41.9—VO = 0V,
PW ≤ 10 µs
IO-Output low short circuit pulsed current1.82.3—VO = 15V,
PW ≤ 10 µs
IR2184(4)(S) & (PbF)
Functional Block Diagrams
2184
DETECT
DELAYVS
PULSE
FILTERHV
LEVEL
SHIFTER
DETECT
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
DEADTIME
COM
VCC
21844
DETECT
DELAY
VSS
PULSE
FILTERHV
LEVEL
SHIFTER
DETECT
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
DEADTIME
COM
VCC
IR2184(4)(S) & (PbF)
5
14-Lead PDIP14-Lead SOIC
IR21844IR21844S
Lead Assignments
8-Lead PDIP8-Lead SOIC
Lead Definitions
SymbolDescriptionLogic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844)Programmable dead-time lead, referenced to VSS. (IR21844 only)
VSSLogic Ground (21844 only)High side floating supplyHigh side gate drive outputHigh side floating supply return
VCCLow side and logic fixed supplyLow side gate drive output
COMLow side return
IR2184IR2184S
COM
VCC
COMBSCC
VSS
COMCC
VSS
COMCC
IR2184(4)(S) & (PbF)
Figure 1. Input/Output Timing DiagramFigure 2. Switching Time Waveform Definitions
^_'''
<`<`
q`q`
7`7`
^_
Figure 5. Delay Matching Waveform Definitions
<`<`
7`
q`
^_
^_
Figure 3. Shutdown Waveform Definitions
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<`
q`
Figure 4. Deadtime Waveform Definitions
<`<`
q`
7`q`
7`
{
IR2184(4)(S) & (PbF)
7
Temperature (oC)
on P
ropag
ion D
elay
Typ.
Max.
Figure 4A. Turn-on Propagation Delay
vs. TemperatureSupply Voltage (V)
agat
ion Del
Figure4B. Turn-on Propagation Delay
vs. Supply VoltageTyp.
Max.
Temperature (oC)
ff P
ropagat
ion D
lay
Typ.
Max.
Figure 5A. Turn-off Propagation Delay
vs. TemperatureSupply Voltage (V)
ff P
ropagat
ion Delay
Figure 5B. Turn-off Propagation Delay
vs. Supply VoltageTyp.
Max.
IR2184(4)(S) & (PbF)
Temperature (oC)
ropag
ion
Typ.
Max.
Figure 6A. SD Propagation Delay
vs. TemperatureSupply Voltage (V)
ropag
ion
lay
Figure 6B. SD Propagation Delay
vs. Supply VoltageMax.
Typ.
Temperature (oC)
Ti
Typ.
Max.
Figure 7A. Turn-on Rise Time vs. TemperatureSupply Voltage (V)
(n
Figure 7B. Turn-on Rise Time vs. Supply VoltageTyp.
Max.
IR2184(4)(S) & (PbF)
9
Temperature (oC)
ff Fa
ll Ti
Typ
Max.
Figure 8A. Turn-off Fall Time vs. Temperature1214161820
Supply Voltage (V)
ff Fa
ll Ti
Figure 8B. Turn-off Fall Time vs. Supply VoltageTyp.
Max.
Temperature (oC)n.
Figure 9A. Deadtime vs. TemperatureTyp.
Max.
Supply Voltage (v)
Deaduim
Figure 9B. Deadtime vs. Supply VoltageTyp.
Max.n.
IR2184(4)(S) & (PbF)50100150200DT (KΗ)
Deadt
Figure 9C. Deadtime vs. RDTTyp.
Max.n.
Temperature (oC)
Logic
put
age (n.
Figure 10A. Logic "1" Input Voltage
vs. Temperature1214161820
Supply Voltage (V)
Logic
t V
age
Figure 10B. Logic "1" Input Voltage
vs. Supply Voltagen.
Temperature (oC)
Logic
nput
age (
Max.
Figure 11A. Logic "0" Input Voltage
vs. Temperature
IR2184(4)(S) & (PbF)
111214161820
Supply Voltage (V)
Logic
npu
t V
age (
Figure 11B. Logic "0" Input Voltage
vs. Supply VoltageMax.
Temperature (oC)
In
t P
iti
Go
Min.
Figure 12A. SD Input Positive Going Threshold
vs. Temperature1214161820
Supply Voltage (V)
nput
itiv
e G
g T
hol
Figure 12B. SD Input Positive Going Threshold
vs. Supply Voltagen.
Temperature (oC)
t Negat
e G
ing T
old (
Max.
Figure 13A. SD Input Negative Going Threshold
vs. Temperature
IR2184(4)(S) & (PbF)1214161820
Supply Voltage (V)
npu
t N
gat
e G
ing T
hold (
Figure 13B. SD Input Negative Going Threshold
vs. Supply VoltageMax.
Temperature (oC)
Lev
el O
tput
Max.
Figure 14A. High Level Output vs. Temperature1214161820
Supply Voltage (V)
High Lev
el O
Figure 14B. High Level Output vs. Supply VoltageMax.
Temperature (oC)
Low
Lev
el O
t (
Max.
igure 15A. Low Level Output vs. Temperature
