IR21814PBF ,HIGH AND LOW SIDE DRIVERFeaturesFloating channel designed for bootstrap operation•Fully operational to +600V14-Lead PDIPTol ..
IR21814S ,High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs, All High Voltage Pins On One Side, Separate Logic and Power Ground in a 14-lead SOIC packageFeaturesFloating channel designed for bootstrap operation•Fully operational to +600V14-Lead PDIPTol ..
IR21814SPBF ,HIGH AND LOW SIDE DRIVERElectrical CharacteristicsV (V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C.BIAS CC BS L ASSSymbol D ..
IR2181S ,High and Low Side Driver, SoftTurn-On, Noninverting Inputs, Separate High and Low Side Inputs in a 8-lead SOIC packageElectrical CharacteristicsV (V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C.BIAS CC BS L ASSSymbol D ..
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IR21814PBF-IR21814SPBF
HIGH AND LOW SIDE DRIVER
International
Data Sheet No. PD60172 Rev.G
ISER (iuctifier IR2181(4)(S) &(PbF)
HIGH AND LOW SIDE DRIVER
Features Packages
q Floating channel designed for bootstrap operation
Fully operational to +600V 3" ~
Tolerant to negative transient voltage 'tlt 8-Lead PDIP 1ta)/r'
dV/dt immune IR2181
. Gate drive supply range from 10 to 20V
. Undervoltage lockout for both channels
. 3.3V and 5V input logic compatible @.
. Matched propagation delay for both channels qi'ti't"t
. Logic and power ground +/- 5V offset. l '
. Lower di/dt gate driver for better noise immunity 8-Lead SOIC
. Output source/sink current capability 1.4A/1.8A IR2181S
14-Lead SOIC
IR21814S
. Also available LEAD-FREE (PbF)
lR2181/lR2183/IR2184 Feature Comparison
Cross-
Description . Part tr] 2323:5231] Dead-Time Ground Pins Ton/Toff
The IR2181(4)(S) are high voltage, logic
high speed power MOSFET and IGBT 221188114 HlN/LIN no none diet,, 180/220 ns
drivers with independent high and low
. 2183 HIN/m yes Internal 500ns COM 180/220 ns
side referenced output channels. Pro- 21834 Program 0.4 - 5 us VSS/COM
prietary HVIC ahd latch immune 2211::4 IN/STO yes P Internagiofrgs diet,, 6801270 ns
CMOS technologies enable rugge- rogram V us
dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side
configuration which operates up to 600 volts.
Typical Connection
upmeoav
IR2181
LIN TO
IR21814
(Referto Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
up to 600V
IR21 81 (4) (S) & (PbF) International
TOR Rectifier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High side floating absolute voltage -0.3 625
Vs High side floating supply offset voltage VB - 25 VB + 0.3
VH0 High side floating output voltage Vs - 0.3 VB + 0.3
Vcc Low side and logic fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 Vcc + 0.3 V
VIN Logic input voltage (HIN & LIN - |R2181/IR21814) Vss - 0.3 Vss + 10
Vss Logic ground (IR21814 only) Vcc - 25 Vcc + 0.3
dVs/dt Allowable offset supply voltage transient - 50 V/ns
PD Package power dissipation @ TA 5 +25°C (8-lead PDIP) - 1.0
(8-Iead SOIC) - 0.625
(14-lead PDIP) - 1.6 W
(14-Iead SOIC) - 1.0
RthJA Thermal resistance, junction to ambient (8-lead PDIP) - 125
(8-Iead SOIC) - 200 °C/W
(14-Iead PDIP) - 75
(14-Iead SOIC) - 120
TJ Junction temperature - 150
Ts Storage temperature -50 150 ''C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The Vs and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
VB High side Mating supply absolute voltage VS + 10 vs + 20
Vs High side floating supply offset voltage Note 1 600
VH0 High side floating output voltage Vs l/B
Vcc Low side and logic fixed supply voltage 10 20 V
VLO Low side output voltage 0 Vcc
VIN Logic input voltage (HIN & LIN - IR2181/IR21814) Vss l/ss + 5
VSS Logic ground (lR21814/lR21824 only) -5 5
TA Ambient temperature -40 125 ''C
Note I: Logic operational tor Vs of -5 to +600V. Logic state held for Vs of -5V to A/BS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.
2
