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High and Low Side Driver, SoftTurn-On, Noninverting Inputs in a 8-pin DIP package
International Data Sheet No. PD60162 Rev.W
TGiR Rectifier IR2106(4)(S) & (pr)
HIGH AND LOW SIDE DRIVER
Features
q Floating channel designed for bootstrap operation Packages
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
. Gate drive supply range from 10 to 20V (IR2106(4))
o Undervoltage lockout for both channels
q 3.3V, 5V and 15V input logic compatible
q Matched propagation delay for both channels
q Logic and power ground +/- 5V offset. 'lt"t5 . q q
q Lower di/dt gate driver for better noise immunity _
q Outputs in phase with inputs (IR2106) 14-Lead SOIC 14-Lead PDIP
q Also available LEAD-FREE
Description 2106/2301II2108II2109l2302l2304Feature Comparison
The IR2106(4)(S) are high voltage, crest
It", sdpfzed 'eit1"'i,r2,1e,il2nTt :ng Part 123:1: 2223:5113: DealTime Ground Pins Ton/Toff
rivers WI In epen en ig loaic
and low side referenced output chan- 2106/2301 HINMN no none COM 2201200
nels. Proprietary HVIC and latch 22110:; - Internal540ns "iff"
immune CMOS technologies enable 21084 HINILIN yes Programmable 0.54His VSS/COM 2201200
ruggedized monolithic construction. 2109/2302 - Internal 540ns COM
The logic input is compatible with 21094 INISD yes Programmable 0.54Hils VSS/COM 750/200
standard CMOS or LSTTL output 2304 HINILIN yes lnternal100ns COM 160/140
down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high
side conhguration which operates up to 600 volts.
Typical Connection
IR2106
up to 600V
(Refer to Lead Assignments for cor- LIN L520
rect pin coMguration). This/These
diagram(s) show electrical ConneC-
tions only. Please refer to our Appli-
cation Notes and DesignTips for
proper circuit board layout.
IR21064
1
IR2106(4)(S)&(PBF) International
TOR Rectifier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High side floating absolute voltage -0.3 625
Vs High side floating supply offset voltage VB - 25 VB + 0.3
VH0 High side floating output voltage Vs - 0.3 VB + 0.3
VCC Low side and logic foasd supply voltage -0.3 25
VLo Low side output voltage -0.3 Vcc + 0.3 V
VIN Logic input voltage vss - 0.3 VCC + 0.3
I/ss Logic ground (IR21064 only) Vcc - 25 Vcc + 0.3
dl/s/dt Allowable offset supply voltage transient - 5O V/ns
PD Package power dissipation @ TA 3 +25°C (8 lead PDIP) - 1.0
(8 lead SOIC) - 0.625
(14 lead PDIP) - 1.6 W
(14 lead SOIC) - 1.0
RthJA Thermal resistance, junction to ambient (8 lead PDIP) - 125
(8 lead SOIC) - 200
(14 lead PDIP) - 75 OCIW
(14 lead SOIC) - 120
TJ Junction temperature - 150
Ts Storage temperature -50 150 °C
TL Lead temperature (soldering, 10 seconds) - 300
2
