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IR2010SPBF
HIGH AND LOW SIDE DRIVER
Data Sheet No. PD60195-D
International
Titait, Rectifier IR2010(S) & (PbF)
Features HIGH AND LOW SIDE DRIVER
q Floating channel designed for bootstrap operation Product Summary
Fully operational to 200V
Tolerant to negative transient voltage, dV/dt immune VOFFSET 200V max.
q Gate drive supply range from 10 to 20V
q Undervoltage lockout for both channels
q 3.3V logic compatible kyr/- 3.0A/ 3.0A typ.
Separate logic supply range from 3.3V to 20V
Logic and power ground ue51/ offset VOUT 10 - 20V
q CMOS Schmitt-triggered inputs with pull-down
q Shut down input turns off both channels
q Matched propagation delay for both channels ton/off 95 & 65 ns typ.
q Outputs in phase with inputs .
q Also available LEAD-FREE Delay Matching 15 ns max.
Applications Packages
. Audio Class D amplifiers
. High power DC-DC SMPS converters
. Other high frequency applications
Description
The IR2010 is a high power, high voltage, high speed power MOSFET and IGBT
drivers with independent high and low side referenced output channels, ideal for Audio
Class D and DC-DC converter applications. Logic inputs are compatible with standard
CMOS or LSTTL output, down to 3.0V logic. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. Propagation de-
lays are matched to simplify use in high frequency applications. The floating channel
can be used to drive an N-channel power MOSFET or IGBT in the high side ctoniigura-
tion which operates up to 200 volts. Proprietary HVIC and latch immune CMOS tech- 1 6-Lea d SOI C
nologies enable ruggedized monolithic construction.
Typical Connection 200V
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2010(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
International
TOR Rectifier
Symbol Definition Min. Max. Units
VB High side floating supply voltage -0.3 225
1/s High side floating supply offset voltage VB - 25 VB + 0.3
VH0 High side floating output voltage Vs - 0.3 V3 + 0.3
Vcc Low side fixed supply voltage -0.3 25 V
VLo Low side output voltage -0.3 Vcc + 0.3
VDD Logic supply voltage -0.3 vss + 25
Vss Logic supply offset voltage Vcc - 25 Vcc + 0.3
VIN Logic input voltage (HIN, LIN & SD) vss - 0.3 VDD + 0.3
dl/s/dt Allowable offset supply voltage transient (figure 2) - 50 V/ns
PD Package power dissipation @ TA S +25''C (14 lead DIP) - 1.6 W
(16 lead SOIC) - 1.25
RTHJA Thermal resistance, junction to ambient (14 lead DIP) - 75 o
(16 lead SOIC) - 100 C/W
Tu Junction temperature - 150
Ts Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The vs and Vss offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in figures 24 and 25.
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage Vs + 10 Vs + 20
VS High side floating supply offset voltage Note 1 200
VH0 High side floating output voltage Vs VB
Vcc Low side fixed supply voltage 10 20
VLO Low side output voltage 0 VCC V
VDD Logic supply voltage Vss + 3 Vss + 20
l/ss Logic supply offset voltage -5 (Note 2) 5
VIN Logic input voltage (HIN, LIN & SD) vss VDD
TA Ambient temperature -40 125 ''C
Note 1: Logic operational for Vs of -4 to +200V. Logic state held for vs of -4V to NBS.
Note 2: When VDD < 5V, the minimum VSS offset is limited to A/DD.
(Please refer to the Design Tip DT97-3 for more details).
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