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IPS06N03LA
OptiMOS®2
technologies
IPD06N03LA G
IPS06N03LA G
IPF06N03LA G
IPU06N03LA G
optiMotsh Power-Transistor ram,
Product Summary Prod uct
Features VDS 25 V
. Ideal for high-frequency dc/dc converters Rosmmax (SMD version) 5.7 mn
. Qualified according to JEDECI) for target application
In 50 A
. N-channel, logic level
. Excellent gate charge x RDSM product (FOM) SEQ
. Superior thermal resistance gate
. 175 "C operating temperature
source
. Pb-free lead plating; RoHS compliant pin 3
Type IPD06N03LA G IPF06N03LA G |PSO6N03LA G IPU06N03LA G
13 Etierq (tab) "a w-iii-tfi-chic' 1
Package PG-T0252-3-11 PG-T0252-3-23 PG-T0251-3-1 1 PG-T0251-3-21
Ordering Code Q67042-S4278 Q67042-S4284 Q67042-S4245 Q67042-S4272
Marking 06N03LA 06N03LA 06N03LA 06N03LA
Maximum ratings, at Tj=25 ''C, unless otherwise specified
Parameter Symbol Conditions Value Unit
Continuous drain current ID Tc=25 oC2) 50 A
Tc=100 °C 50
Pulsed drain current ID,pulse Tc=25 °C3) 350
Avalanche energy, single pulse EAS [0:45 A, Rss=25 f2 225 mJ
I 0:50 A, Vos=20 V,
Reverse diode dv/dt dv/dt di/dt=200 Alps, 6 kV/ps
Trmax=175 ''C
Gate source voltage') Vss :20 V
Power dissipation Ptot Tc=25 "C 83 W
Operating and storage temperature Ti, Tstg -55 ... 175 "C
IEC climatic category; DIN IEC 68-1 55/175/56
Rev. 1.71 page 1 2004-07-22
IPD06N03LA G IPF06N03LA G
tec h nologies IPS06N03LA G |PU06N03LA G
Parameter Symbol Conditions Values Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case RM; - - 1.8 K/W
SMD version, device on PCB RthJA minimal footprint - - 75
6 cm2 cooling area5) - - 50
Electrical characteristics, at Tj=25 ''C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BRmSS b'ss=0 V, I D=1 mA 25 - - V
Gate threshold voltage Vesan) VDS=VGS, / D=40 pA 1.2 1.6 2
V =25 V, V =0 V,
Zero gate voltage drain current loss [is 0 GS - 0.1 1 pA
Ti=25 C
VDS=25 V, Vss--0 V,
Tj=125 °C - 10 100
Gate-source leakage current I GSS VGS=20 V, Vos=0 V - 10 100 nA
Drain-source on-state resistance Rros(on) Vss--4.5 V, I D--30 A - 7.7 9.6 m9
VGS=4-5 V, ID=30 A,
SMD version - 7.5 9.4
VGS=10 V, lo=30 A - 5.0 5.9
VGS=10 V, ID=3O A,
SMD version - 4.8 5.7
Gate resistance RG - 1 - f2
V >2 I R ,
Transconductance " I _DS| I DI DS(on)max 29 59 - S
hr--30 A
I) J-STD20 and JESD22
2) Current is limited by bondwire; with an RmJC=1.8 K/Wthe chip is able to carry 94 A.
3) See figure 3
4) lemax=150 ''C and duty cycle D<0.25 for VGS<-5 V
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 pm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.71
page 2
