IP4769CZ14 ,VGA interface ESD protection with integratedtermination resistorsGeneral descriptionThe IP4769CZ14 connects between the Video Graphics Adapter (VGA)/Digital Video I ..
IP4770CZ16 ,VGA/video interface with integrated buffers, ESD protection and integrated termination resistors IP4770/71/72CZ16VGA/video interface with integrated buffers, ESD protection and integrated termina ..
IP4770CZ16 ,VGA/video interface with integrated buffers, ESD protection and integrated termination resistorsFeatures and benefits Integrated high-level ESD protection, buffering, SYNC signal impedance match ..
IP4771CZ16 ,VGA/video interface with integrated buffers, ESD protection and integrated termination resistorsFeatures and benefits Integrated high-level ESD protection, buffering, SYNC signal impedance match ..
IP4772CZ16 ,VGA/video interface with integrated buffers, ESD protection and integrated termination resistorsGeneral descriptionThe IP4770CZ16, IP4771CZ16, IP4772CZ16 is connected between the VGA/DVI interfac ..
IP4776CZ38 ,Fully integrated HDMI interface with level shifter, ESD and backdrive protectionGeneral descriptionThe IP4776CZ38 is designed for HDMI host-interface protection. The IP4776CZ38 in ..
IRGP4063D ,600V UltraFast Copack Trench IGBT in a TO-247AC package for apliance motion applications
IRGP4065DPBF ,300V UltraFast Copack Plasma Display Panel Trench IGBT in a TO-247AC package
IRGP4065DPBF ,300V UltraFast Copack Plasma Display Panel Trench IGBT in a TO-247AC package
IRGP4068D ,600V UltraFast Copack Trench IGBT in a TO-247 package with Ultra-Low VF Diode for Induction Heating and Soft Switching Apps
IRGP4068D-EPBF ,600V UltraFast Copack Trench IGBT in a TO-247 package with Ultra-Low VF Diode for Induction Heating and Soft Switching Apps
IRGP4068DPBF , INSULATED GATE BIPOLAR TRANSISTOR WITH ULTRA-LOW VF DIODE FOR INDUCTION HEATING AND SOFT SWITCHING APPLICATIONS
IP4769CZ14
VGA interface ESD protection with integratedtermination resistors
1. Product profile
1.1 General descriptionThe IP4769CZ14 connects between the Video Graphics Adapter (VGA)/Digital Video
Interface (DVI) and the video transmitter like e.g. a PC graphic card or the VGA receiver
like e.g. a PC Monitor.
The IP4769CZ14 includes ElectroStatic Discharge (ESD) protection for the Data Display
Channel (DDC) signals, DDC level shifting and ESD protection for both
SYNChronization (SYNC) lines as well as high-level ESD protection diodes for the
Red-Green-Blue (RGB) signal lines.
The DDC level shifting can be used to shift the 5 V DDC bus at the connector side 3.3V or 2.5 V on the internal side.
1.2 Features and benefits Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen
and antimony (Dark Green compliant) Integrated high-level ESD protection and level shifting DDC level shifting from 5 V to 3.3 V or 2.5V IEC 61000-4-2, ±4 kV rail-to-rail clamping for each I/O line Channel capacitance Cch <4pF
1.3 Applications To reduce ElectroMagnetic Interferences (EMI)/Radio Frequency Interferences (RFI)
and to provide downstream ESD protection for: VGA interfaces including DDC channels Desktop and notebook PCs Graphics cards Set-top boxes
IP4769CZ14
VGA interface ESD protection with integrated
termination resistors
Rev. 1 — 17 January 2011 Product data sheet
NXP Semiconductors IP4769CZ14
VGA interface ESD protection with integrated termination resistors
2. Pinning information
2.1 Pinning
2.2 Pin description
3. Ordering information
Table 1. Pin descriptionVIDEO_2 1 video signal ESD protection channel2
VIDEO_1 2 video signal ESD protection channel1
VBIAS_VIDEO 3 ESD bias voltage for VIDEO_1, VIDEO_2 and VIDEO_3 protection circuit
GND 4 ground
GND 5 ground
VBIAS_DDC 6 bias voltage for DDC level shifter N-FET gates
BYP 7 optional external 100 nF bypass capacitor to enhance internal zener
performance on SYNC_OUT1, SYNC_OUT2, DDC_OUT1 and DDC_OUT2
DDC_OUT1 8 DDC signal output 1; connector side
DDC_IN1 9 DDC signal input 1; VGA controller side
DDC_IN2 10 DDC signal input 2; VGA controller side
DDC_OUT2 11 DDC signal output 2; connector side
SYNC_OUT1 12 SYNC signal output 1; ESD clamp; connector side
SYNC_OUT2 13 SYNC signal output 2; ESD clamp; connector side
VIDEO_3 14 video signal ESD protection channel3
Table 2. Ordering informationIP4769CZ14 TSSOP14 plastic shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
NXP Semiconductors IP4769CZ14
VGA interface ESD protection with integrated termination resistors
4. Functional diagramNXP Semiconductors IP4769CZ14
VGA interface ESD protection with integrated termination resistors
5. Limiting values[1] BYP, VCC_VIDEO and VCC_SYNC must be bypassed to GND via a low impedance ground plane
with 100 nF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse is applied between the
pins (VIDEO_1; VIDEO_2; VIDEO_3; SYNC_OUT1; SYNC_OUT2; DCC_OUT1; DCC_OUT2) and GND.
[2] According to IEC 61000-4-2, level 3, contact discharge.
[3] Machine model according to ESD22-A115-A.
[4] Human Body Model (HBM) according to JESD22-A-J114D.
6. Recommended operating conditions
Table 3. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referencedto GND.
VESD electrostatic
discharge voltage
[1][2]- ±6kV
all pins
[3]- ±200 V
[4]- ±2kV
VCC(VIDEO) video supply voltage −0.5 5.5 V
VCC(DDC) data display channel
supply voltage −0.5 5.5 V
VI(VIDEO_2) input voltage pin VIDEO_2 −0.5 VCC(VIDEO) V
VI(VIDEO_3) input voltage pin VIDEO_3 −0.5 VCC(VIDEO) V
VI(DDC_IN1) input voltage pin DDC_IN1 −0.5 5.5 V
VI(DDC_IN2) input voltage pin DDC_IN2 −0.5 5.5 V
VO(DDC_OUT1) output voltage pin DDC_OUT1 −0.5 5.5 V
VO(DDC_OUT2) output voltage pin DDC_OUT2 −0.5 5.5 V
Tstg storage temperature −55 +125 °C
Table 4. Recommended operating conditionsTamb ambient temperature −40 - +85 °C
NXP Semiconductors IP4769CZ14
VGA interface ESD protection with integrated termination resistors
7. Characteristics[1] This parameter is guaranteed by design and characterization.
[1] This parameter is guaranteed by design and characterization.
[2] According to IEC 61000-4-5 and IEC 61000-4-9.
[3] According to IEC 61000-4-2, contact discharge.
[4] For level shifting N-FET.
[1] This parameter is guaranteed by design and characterization.
Table 5. Analog video (R, G, B) characteristicsVCC(VIDEO) =5 V; Tamb =25 °C; unless otherwise specified.
ICC supply current static input signals - - 10 μA
Cch channel capacitance f=1 MHz; =2.5 V(p-p);
Vbias =2.5V
[1] --4 pF
Ii(video) video input current VIN =VCC(VIDEO) or
VIN =GND −1- +1 μA forward voltage IF=1 mA -0.7 -V
Table 6. DDC level shifter characteristicsVCC(DDC) =5V; Tamb =25 °C; unless otherwise specified.
Cch channel capacitance f=1 MHz; =2.5 V(p-p);
Vbias =2.5V
[1] --4 pF
Rdyn dynamic resistance I=1A [2]
positive transient - - 2.4 Ω
negative transient - - 1.3 Ω
VCL clamping voltage VESD =8kV;
positive transient
[3] -8 -V
ΔVon on-state voltage drop [4]- 85 140 mV forward voltage IF=1 mA -0.7 -V
Table 7. SYNC protection characteristicsVCC(SYNC) =5V; Tamb =25 °C; unless otherwise specified.
Cch channel capacitance f=1 MHz;
VCC(SYNC) =2.5 V(p-p);
Vbias =2.5V
[1] --4 pF forward voltage IF=1 mA -0.7 -V
NXP Semiconductors IP4769CZ14
VGA interface ESD protection with integrated termination resistors
8. Application informationTo maximize ESD clamping performance, the IP4769CZ14 should be placed as close as
possible to the VGA/DVI connector. The ESD protection channels VIDEO_1, VIDEO_2
and VIDEO_3 are identical and can be connected in any order with R, B, G signals to
simplify routing, and minimize stubs and vias. The SYNC protection lines are also
identical and can be used in any order for HSYNC or VSYNC signals. The DDC level
shifter lines are likewise identical in function.
The pull-up resistors on the DDC lines are dictated by the application, depending on the
values of the internal pull-ups provided in the Application-Specific Integrated
Circuit (ASIC), etc. Weak pull-ups may be required, for example, to pull up the DDC_INx
lines to VCC_5V when no monitor is connected, if the local ASIC does not include internal
pull-ups. Unexpected backdrive current can flow through these resistors though, when an
external monitor is powered and the local VCC_5V is powered down. Backdrive protection
should be considered if this is a concern.
